Abstract
A tight link between design and test data is proposed for speeding up test-pattern generation and diagnosis during mixed-signal prototype verification. Test requirements are already incorporated at the behavioral level and specified with increased detail at lower hierarchical levels. A strict distinction between generic routines and implementation data makes reuse of software possible. A testability-analysis tool and test and DFT libraries support the designer to guarantee testability. Hierarchical backtrace procedures in combination with an expert system and fault libraries assist the designer during mixed-signal chip debugging
| Original language | Undefined |
|---|---|
| Pages | 88-93 |
| DOIs | |
| Publication status | Published - 1993 |
| Event | Second Asian Test Symposium, ATS 1993 - Beijing, China Duration: 16 Nov 1993 → 18 Nov 1993 |
Conference
| Conference | Second Asian Test Symposium, ATS 1993 |
|---|---|
| Period | 16/11/93 → 18/11/93 |
| Other | November 16-18, 1993 |
Keywords
- IR-56059
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