In this paper, a new procedure to derive testability measures is presented. Digital testability can be calculated by means of probability, while in analog it is possible to calculate testability using impedance values. Although attempts have been made to reach compatibility, matching was somewhat arbitrary and therefore not necessarily compatible. The concept of the new approach is that digital and analog can be integrated in a more consistent way. More realistic testability figures are obtained, which makes testability of true mixed-signal systems and circuits feasible. To verify the results, our method is compared with a sensitivity analysis, for a simple 3-bit ADC.
|Title of host publication||Proceedings ProRISC 2005, 16th Workshop on Circuits, Systems and Signal Processing|
|Place of Publication||Utrecht, The Netherlands|
|Number of pages||6|
|Publication status||Published - 2005|
|Event||16th Workshop on Circuits, Systems and Signal Processing, ProRISC 2005 - Veldhoven, Netherlands|
Duration: 17 Nov 2005 → 18 Nov 2005
Conference number: 16
|Publisher||STW Technology Foundation|
|Workshop||16th Workshop on Circuits, Systems and Signal Processing, ProRISC 2005|
|Period||17/11/05 → 18/11/05|
van de Kraats, A., & Kerkhoff, H. G. (2005). Mixed-Signal Testability Analysis for Data-Converter IPs. In Proceedings ProRISC 2005, 16th Workshop on Circuits, Systems and Signal Processing (pp. 1-6). Utrecht, The Netherlands: STW.