Model-Based Application Development for Massively Parallel Embedded Systems

J.W.M. Jacobs

Abstract

The development of embedded systems in information-rich contexts is governed by some intertwined trends. The increase of both volume of data to be processed and the related processing functionality feeds the growing complexity of applications. Independently, the processing hardware that is needed to process these applications is becoming increasingly parallel and heterogeneous (many-core) because of performance and power problems. Furthermore, today's compiler technology is not able to translate sequential legacy code for multi-core or many-core systems in an efficient way. This thesis addresses the problem of generating efficient code for a number of cores, that operate synchronously. Examples are SIMD and VLIW architectures. In this thesis we restrict ourselves to architectures that include a control processor that provides the instruction stream. In practice the manufacturers of such many-core processors only provide a C-compiler that supports hardware intrinsic instructions. This situation usually requires manual adaptation of sequential code. Unfortunately, a first feedback of the implementation on the targeted parallel architecture only comes late in the development trajectory. Moreover, during implementation phases more engineers enter the project and this increases the risk of early errors proliferating to later phases. Although some parts of the system can be modelled in high level language(s) (e.g., MATLAB), the typical approach lacks a single integral and executable framework allowing for an immediate system-wide verification. This thesis proposes an integral design methodology, named IRIS, for the development of firmware for many-core architectures. The methodology is illustrated by three cases: a colour image processing pipeline for a printer, stochastic image quantisation, and data mining of dynamic document spaces. For the three cases the various development phases and the associated development roles result in mathematical models, that can be directly transcribed in a functional language. The executable models are subsequently transformed into a series of implementation models, that converge to the targeted many-core implementation.
Original languageUndefined
Awarding Institution
  • University of Twente
Supervisors/Advisors
  • Smit, Gerardus Johannes Maria, Supervisor
  • Kuper, Jan , Advisor
Date of Award20 Nov 2008
Place of PublicationEnschede
Print ISBNs978-90-365-2752-1
DOIs
StatePublished - 20 Nov 2008

Fingerprint

Very long instruction word architecture
Color image processing
Hardware
Firmware
High level languages
Parallel architectures
Embedded systems
MATLAB
Data mining
Pipelines
Trajectories
Mathematical models
Feedback
Engineers

Keywords

  • IR-60133
  • EWI-14114
  • Many core systemsEmbedded systemsFunctional derivationDesign methodologyFirmware
  • METIS-254910

Cite this

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title = "Model-Based Application Development for Massively Parallel Embedded Systems",
abstract = "The development of embedded systems in information-rich contexts is governed by some intertwined trends. The increase of both volume of data to be processed and the related processing functionality feeds the growing complexity of applications. Independently, the processing hardware that is needed to process these applications is becoming increasingly parallel and heterogeneous (many-core) because of performance and power problems. Furthermore, today's compiler technology is not able to translate sequential legacy code for multi-core or many-core systems in an efficient way. This thesis addresses the problem of generating efficient code for a number of cores, that operate synchronously. Examples are SIMD and VLIW architectures. In this thesis we restrict ourselves to architectures that include a control processor that provides the instruction stream. In practice the manufacturers of such many-core processors only provide a C-compiler that supports hardware intrinsic instructions. This situation usually requires manual adaptation of sequential code. Unfortunately, a first feedback of the implementation on the targeted parallel architecture only comes late in the development trajectory. Moreover, during implementation phases more engineers enter the project and this increases the risk of early errors proliferating to later phases. Although some parts of the system can be modelled in high level language(s) (e.g., MATLAB), the typical approach lacks a single integral and executable framework allowing for an immediate system-wide verification. This thesis proposes an integral design methodology, named IRIS, for the development of firmware for many-core architectures. The methodology is illustrated by three cases: a colour image processing pipeline for a printer, stochastic image quantisation, and data mining of dynamic document spaces. For the three cases the various development phases and the associated development roles result in mathematical models, that can be directly transcribed in a functional language. The executable models are subsequently transformed into a series of implementation models, that converge to the targeted many-core implementation.",
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Model-Based Application Development for Massively Parallel Embedded Systems. / Jacobs, J.W.M.

Enschede, 2008. 210 p.

Research output: ScientificPhD Thesis - Research external, graduation UT

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N2 - The development of embedded systems in information-rich contexts is governed by some intertwined trends. The increase of both volume of data to be processed and the related processing functionality feeds the growing complexity of applications. Independently, the processing hardware that is needed to process these applications is becoming increasingly parallel and heterogeneous (many-core) because of performance and power problems. Furthermore, today's compiler technology is not able to translate sequential legacy code for multi-core or many-core systems in an efficient way. This thesis addresses the problem of generating efficient code for a number of cores, that operate synchronously. Examples are SIMD and VLIW architectures. In this thesis we restrict ourselves to architectures that include a control processor that provides the instruction stream. In practice the manufacturers of such many-core processors only provide a C-compiler that supports hardware intrinsic instructions. This situation usually requires manual adaptation of sequential code. Unfortunately, a first feedback of the implementation on the targeted parallel architecture only comes late in the development trajectory. Moreover, during implementation phases more engineers enter the project and this increases the risk of early errors proliferating to later phases. Although some parts of the system can be modelled in high level language(s) (e.g., MATLAB), the typical approach lacks a single integral and executable framework allowing for an immediate system-wide verification. This thesis proposes an integral design methodology, named IRIS, for the development of firmware for many-core architectures. The methodology is illustrated by three cases: a colour image processing pipeline for a printer, stochastic image quantisation, and data mining of dynamic document spaces. For the three cases the various development phases and the associated development roles result in mathematical models, that can be directly transcribed in a functional language. The executable models are subsequently transformed into a series of implementation models, that converge to the targeted many-core implementation.

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