Multi-core Architectures and Streaming Applications

Gerard J.M. Smit; André B.J. Kokkeler; Pascal T. Wolkotte; Marcel D. van de Burgwal

doi:10.1145/1353610.1353618

Multi-core Architectures and Streaming Applications

Gerard J.M. Smit, André B.J. Kokkeler, Pascal T. Wolkotte, Marcel D. van de Burgwal

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

21 Citations (Scopus)

252 Downloads (Pure)

Abstract

In this paper we focus on algorithms and reconfigurable multi-core architectures for streaming digital signal processing (DSP) applications. The multi-core concept has a number of advantages: (1) depending on the requirements more or fewer cores can be switched on/off, (2) the multi-core structure fits well to future process technologies, more cores will be available in advanced process technologies, but the complexity per core does not increase, (3) the multi-core concept is fault tolerant, faulty cores can be discarded and (4) multiple cores can be configured fast in parallel. Because in our approach processing and memory are combined in the cores, tasks can be executed efficiently on cores (locality of reference). There are a number of application domains that can be considered as streaming DSP applications: for example wireless baseband processing (for HiperLAN/2, WiMax, DAB, DRM, and DVB), multimedia processing (e.g. MPEG, MP3 coding/decoding), medical image processing, colour image processing, sensor processing (e.g. remote surveillance cameras) and phased array radar systems. In this paper the key characteristics of streaming DSP applications are highlighted, and the characteristics of the processing architectures to efficiently support these types of applications are addressed. We present the initial results of the Annabelle chip that we designed with our approach.

Original language	English
Title of host publication	Proceedings of the Tenth International Workshop on System-Level Interconnect Prediction (SLIP 2008)
Editors	I. Mandoiu, A. Kennings
Place of Publication	New York, NY, USA
Publisher	Association for Computing Machinery
Pages	35-42
Number of pages	8
ISBN (Print)	978-1-59593-918-0
DOIs	https://doi.org/10.1145/1353610.1353618
Publication status	Published - Apr 2008
Event	10th International Workshop on System-Level Interconnect Prediction, SLIP 2008 - Newcastle, United Kingdom Duration: 5 Apr 2008 → 6 Apr 2008 Conference number: 10

Workshop

Workshop	10th International Workshop on System-Level Interconnect Prediction, SLIP 2008
Abbreviated title	SLIP
Country/Territory	United Kingdom
City	Newcastle
Period	5/04/08 → 6/04/08

Keywords

EC Grant Agreement nr.: FP6/001908
CAES-EEA: Efficient Embedded Architectures
2023 OA procedure

Access to Document

10.1145/1353610.1353618

ArticleFinal published version, 351 KBLicence: Taverne

Cite this

@inproceedings{6b3c778527544d65839da95fd11cbee6,

title = "Multi-core Architectures and Streaming Applications",

abstract = "In this paper we focus on algorithms and reconfigurable multi-core architectures for streaming digital signal processing (DSP) applications. The multi-core concept has a number of advantages: (1) depending on the requirements more or fewer cores can be switched on/off, (2) the multi-core structure fits well to future process technologies, more cores will be available in advanced process technologies, but the complexity per core does not increase, (3) the multi-core concept is fault tolerant, faulty cores can be discarded and (4) multiple cores can be configured fast in parallel. Because in our approach processing and memory are combined in the cores, tasks can be executed efficiently on cores (locality of reference). There are a number of application domains that can be considered as streaming DSP applications: for example wireless baseband processing (for HiperLAN/2, WiMax, DAB, DRM, and DVB), multimedia processing (e.g. MPEG, MP3 coding/decoding), medical image processing, colour image processing, sensor processing (e.g. remote surveillance cameras) and phased array radar systems. In this paper the key characteristics of streaming DSP applications are highlighted, and the characteristics of the processing architectures to efficiently support these types of applications are addressed. We present the initial results of the Annabelle chip that we designed with our approach.",

keywords = "EC Grant Agreement nr.: FP6/001908, CAES-EEA: Efficient Embedded Architectures, 2023 OA procedure",

author = "Smit, {Gerard J.M.} and Kokkeler, {Andr{\'e} B.J.} and Wolkotte, {Pascal T.} and {van de Burgwal}, {Marcel D.}",

year = "2008",

month = apr,

doi = "10.1145/1353610.1353618",

language = "English",

isbn = "978-1-59593-918-0",

pages = "35--42",

editor = "I. Mandoiu and A. Kennings",

booktitle = "Proceedings of the Tenth International Workshop on System-Level Interconnect Prediction (SLIP 2008)",

publisher = "Association for Computing Machinery",

address = "United States",

note = "10th International Workshop on System-Level Interconnect Prediction, SLIP 2008, SLIP ; Conference date: 05-04-2008 Through 06-04-2008",

}

Smit, GJM, Kokkeler, ABJ, Wolkotte, PT & van de Burgwal, MD 2008, Multi-core Architectures and Streaming Applications. in I Mandoiu & A Kennings (eds), Proceedings of the Tenth International Workshop on System-Level Interconnect Prediction (SLIP 2008). Association for Computing Machinery, New York, NY, USA, pp. 35-42, 10th International Workshop on System-Level Interconnect Prediction, SLIP 2008, Newcastle, United Kingdom, 5/04/08. https://doi.org/10.1145/1353610.1353618

Multi-core Architectures and Streaming Applications. / Smit, Gerard J.M.; Kokkeler, André B.J.; Wolkotte, Pascal T. et al.
Proceedings of the Tenth International Workshop on System-Level Interconnect Prediction (SLIP 2008). ed. / I. Mandoiu; A. Kennings. New York, NY, USA: Association for Computing Machinery, 2008. p. 35-42.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - Multi-core Architectures and Streaming Applications

AU - Smit, Gerard J.M.

AU - Kokkeler, André B.J.

AU - Wolkotte, Pascal T.

AU - van de Burgwal, Marcel D.

N1 - Conference code: 10

PY - 2008/4

Y1 - 2008/4

N2 - In this paper we focus on algorithms and reconfigurable multi-core architectures for streaming digital signal processing (DSP) applications. The multi-core concept has a number of advantages: (1) depending on the requirements more or fewer cores can be switched on/off, (2) the multi-core structure fits well to future process technologies, more cores will be available in advanced process technologies, but the complexity per core does not increase, (3) the multi-core concept is fault tolerant, faulty cores can be discarded and (4) multiple cores can be configured fast in parallel. Because in our approach processing and memory are combined in the cores, tasks can be executed efficiently on cores (locality of reference). There are a number of application domains that can be considered as streaming DSP applications: for example wireless baseband processing (for HiperLAN/2, WiMax, DAB, DRM, and DVB), multimedia processing (e.g. MPEG, MP3 coding/decoding), medical image processing, colour image processing, sensor processing (e.g. remote surveillance cameras) and phased array radar systems. In this paper the key characteristics of streaming DSP applications are highlighted, and the characteristics of the processing architectures to efficiently support these types of applications are addressed. We present the initial results of the Annabelle chip that we designed with our approach.

AB - In this paper we focus on algorithms and reconfigurable multi-core architectures for streaming digital signal processing (DSP) applications. The multi-core concept has a number of advantages: (1) depending on the requirements more or fewer cores can be switched on/off, (2) the multi-core structure fits well to future process technologies, more cores will be available in advanced process technologies, but the complexity per core does not increase, (3) the multi-core concept is fault tolerant, faulty cores can be discarded and (4) multiple cores can be configured fast in parallel. Because in our approach processing and memory are combined in the cores, tasks can be executed efficiently on cores (locality of reference). There are a number of application domains that can be considered as streaming DSP applications: for example wireless baseband processing (for HiperLAN/2, WiMax, DAB, DRM, and DVB), multimedia processing (e.g. MPEG, MP3 coding/decoding), medical image processing, colour image processing, sensor processing (e.g. remote surveillance cameras) and phased array radar systems. In this paper the key characteristics of streaming DSP applications are highlighted, and the characteristics of the processing architectures to efficiently support these types of applications are addressed. We present the initial results of the Annabelle chip that we designed with our approach.

KW - EC Grant Agreement nr.: FP6/001908

KW - CAES-EEA: Efficient Embedded Architectures

KW - 2023 OA procedure

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DO - 10.1145/1353610.1353618

M3 - Conference contribution

SN - 978-1-59593-918-0

SP - 35

EP - 42

BT - Proceedings of the Tenth International Workshop on System-Level Interconnect Prediction (SLIP 2008)

A2 - Mandoiu, I.

A2 - Kennings, A.

PB - Association for Computing Machinery

CY - New York, NY, USA

T2 - 10th International Workshop on System-Level Interconnect Prediction, SLIP 2008

Y2 - 5 April 2008 through 6 April 2008

ER -

Multi-core Architectures and Streaming Applications

Abstract

Workshop

Keywords

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