N-channel MOSFETs fabricated on SiGe dots for strain-enhanced mobility

V. Jovanovic*, C. Biasotto, L.K. Nanver, J. Moers, D. Grutzmacher, J. Gerharz, G. Mussler, J. Van Der Cingel, J. J. Zhang, G. Bauer, O.G. Schmidt, L. Miglio

*Corresponding author for this work

Research output: Contribution to journalArticleAcademicpeer-review

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The silicon germanium dots grown in the StranskiKrastanow mode are used to induce biaxial tensile strain in a silicon capping layer. A high Ge content and correspondingly high Si strain levels are reached due to the 3-D growth of the dots. The n-channel MOS devices, referred to in this letter as DotFETs, are processed with the main gate segment above the strained Si layer on a single dot. To prevent the intermixing of the Si/SiGe/Si structure, a novel low-temperature FET structure processed below 400 °C has been implemented: The ultrashallow source/drain junctions formed by excimer-laser annealing in the full-melt mode of ion-implanted dopants are self-aligned to a metal gate. The crystallinity of the structure is preserved throughout the processing, and compared to reference devices, an average increase in the drain current of up to 22.5% is obtained.

Original languageEnglish
Article number5557748
Pages (from-to)1083-1085
Number of pages3
JournalIEEE electron device letters
Issue number10
Early online date26 Aug 2010
Publication statusPublished - Oct 2010
Externally publishedYes


  • CMOS
  • excimer-laser annealing (ELA)
  • low-temperature gate stack
  • SiGe
  • strain-enhanced mobility
  • StranskiKrastanow (SK) growth mode
  • ultrashallow source/drain junctions

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