Abstract
| Original language | English |
|---|---|
| Article number | 10.1155/2009/678045 |
| Pages (from-to) | 678045 |
| Number of pages | 12 |
| Journal | International journal on reconfigurable computing |
| Volume | 2009 |
| Issue number | 10.1155/2009/678045 |
| DOIs | |
| Publication status | Published - 2009 |
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Keywords
- CAES-EEA: Efficient Embedded Architectures
- EC Grant Agreement nr.: FP6/001908
- IR-68162
- METIS-264424
- EWI-16085
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Non-power-of-Two FFTs: Exploring the Flexibility of the Montium TP. / van de Burgwal, M.D.; Hauck, S.A. (Editor); Wolkotte, P.T.; Smit, Gerardus Johannes Maria.
In: International journal on reconfigurable computing, Vol. 2009, No. 10.1155/2009/678045, 10.1155/2009/678045, 2009, p. 678045.Research output: Contribution to journal › Article › Academic › peer-review
TY - JOUR
T1 - Non-power-of-Two FFTs: Exploring the Flexibility of the Montium TP
AU - van de Burgwal, M.D.
AU - Wolkotte, P.T.
AU - Smit, Gerardus Johannes Maria
A2 - Hauck, S.A.
PY - 2009
Y1 - 2009
N2 - Coarse-grain reconfigurable architectures, like the Montium TP, have proven to be a very successful approach for low-power and high-performance computation of regular digital signal processing algorithms. This paper presents the implementation of a class of non-power-of-two FFTs to discover the limitations and Flexibility of the Montium TP for less regular algorithms. A non-power-of-two FFT is less regular compared to a traditional power-of-two FFT. The results of the implementation show the processing time, accuracy, energy consumption and Flexibility of the implementation.
AB - Coarse-grain reconfigurable architectures, like the Montium TP, have proven to be a very successful approach for low-power and high-performance computation of regular digital signal processing algorithms. This paper presents the implementation of a class of non-power-of-two FFTs to discover the limitations and Flexibility of the Montium TP for less regular algorithms. A non-power-of-two FFT is less regular compared to a traditional power-of-two FFT. The results of the implementation show the processing time, accuracy, energy consumption and Flexibility of the implementation.
KW - CAES-EEA: Efficient Embedded Architectures
KW - EC Grant Agreement nr.: FP6/001908
KW - IR-68162
KW - METIS-264424
KW - EWI-16085
U2 - 10.1155/2009/678045
DO - 10.1155/2009/678045
M3 - Article
VL - 2009
SP - 678045
JO - International journal on reconfigurable computing
JF - International journal on reconfigurable computing
SN - 1687-7195
IS - 10.1155/2009/678045
M1 - 10.1155/2009/678045
ER -