Novel test structures for dedicated temperature budget determination

    Research output: Contribution to journalArticleAcademicpeer-review

    4 Citations (Scopus)

    Abstract

    We present a novel method for determining the temperature budget of the process side of silicon substrates and chips, based on well-known silicide formation reactions of metal–Si systems and (four-point probe) resistance measurements. In this paper, we focus on the Pd–Si system that is most temperature sensitive in the range from 100 °C to 200 °C. A variety of test structures is introduced to exploit the specific properties of the diffusion-limited reaction between Pd and Si. Among others, this resulted in gap-based layouts that facilitate an extension of the temperature range to 350 °C. Designs and measurement results are presented, indicating the practicality and the robustness of the proposed technique.
    Original languageUndefined
    Pages (from-to)339-345
    Number of pages7
    JournalIEEE transactions on semiconductor manufacturing
    Volume25
    Issue number3
    DOIs
    Publication statusPublished - 1 Aug 2012

    Keywords

    • EWI-22224
    • Metallization
    • Silicon on insulator technology
    • IR-81449
    • process monitoring
    • METIS-287995
    • Temperature measurement

    Cite this

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    title = "Novel test structures for dedicated temperature budget determination",
    abstract = "We present a novel method for determining the temperature budget of the process side of silicon substrates and chips, based on well-known silicide formation reactions of metal–Si systems and (four-point probe) resistance measurements. In this paper, we focus on the Pd–Si system that is most temperature sensitive in the range from 100 °C to 200 °C. A variety of test structures is introduced to exploit the specific properties of the diffusion-limited reaction between Pd and Si. Among others, this resulted in gap-based layouts that facilitate an extension of the temperature range to 350 °C. Designs and measurement results are presented, indicating the practicality and the robustness of the proposed technique.",
    keywords = "EWI-22224, Metallization, Silicon on insulator technology, IR-81449, process monitoring, METIS-287995, Temperature measurement",
    author = "Faber, {Erik Jouwert} and Wolters, {Robertus A.M.} and Jurriaan Schmitz",
    note = "eemcs-eprint-22224",
    year = "2012",
    month = "8",
    day = "1",
    doi = "10.1109/TSM.2012.2202793",
    language = "Undefined",
    volume = "25",
    pages = "339--345",
    journal = "IEEE transactions on semiconductor manufacturing",
    issn = "0894-6507",
    publisher = "IEEE",
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    }

    Novel test structures for dedicated temperature budget determination. / Faber, Erik Jouwert; Wolters, Robertus A.M.; Schmitz, Jurriaan.

    In: IEEE transactions on semiconductor manufacturing, Vol. 25, No. 3, 01.08.2012, p. 339-345.

    Research output: Contribution to journalArticleAcademicpeer-review

    TY - JOUR

    T1 - Novel test structures for dedicated temperature budget determination

    AU - Faber, Erik Jouwert

    AU - Wolters, Robertus A.M.

    AU - Schmitz, Jurriaan

    N1 - eemcs-eprint-22224

    PY - 2012/8/1

    Y1 - 2012/8/1

    N2 - We present a novel method for determining the temperature budget of the process side of silicon substrates and chips, based on well-known silicide formation reactions of metal–Si systems and (four-point probe) resistance measurements. In this paper, we focus on the Pd–Si system that is most temperature sensitive in the range from 100 °C to 200 °C. A variety of test structures is introduced to exploit the specific properties of the diffusion-limited reaction between Pd and Si. Among others, this resulted in gap-based layouts that facilitate an extension of the temperature range to 350 °C. Designs and measurement results are presented, indicating the practicality and the robustness of the proposed technique.

    AB - We present a novel method for determining the temperature budget of the process side of silicon substrates and chips, based on well-known silicide formation reactions of metal–Si systems and (four-point probe) resistance measurements. In this paper, we focus on the Pd–Si system that is most temperature sensitive in the range from 100 °C to 200 °C. A variety of test structures is introduced to exploit the specific properties of the diffusion-limited reaction between Pd and Si. Among others, this resulted in gap-based layouts that facilitate an extension of the temperature range to 350 °C. Designs and measurement results are presented, indicating the practicality and the robustness of the proposed technique.

    KW - EWI-22224

    KW - Metallization

    KW - Silicon on insulator technology

    KW - IR-81449

    KW - process monitoring

    KW - METIS-287995

    KW - Temperature measurement

    U2 - 10.1109/TSM.2012.2202793

    DO - 10.1109/TSM.2012.2202793

    M3 - Article

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    SP - 339

    EP - 345

    JO - IEEE transactions on semiconductor manufacturing

    JF - IEEE transactions on semiconductor manufacturing

    SN - 0894-6507

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