Omphale: Streamlining the Communication for Jobs in a Multi Processor System on Chip

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Abstract

Our Multi Processor System on Chip (MPSoC) template provides processing tiles that are connected via a network on chip. A processing tile contains a processing unit and a Scratch Pad Memory (SPM). This paper presents the Omphale tool that performs the first step in mapping a job, represented by a task graph, to such an MPSoC, given the SPM sizes as constraints. Furthermore a memory tile is introduced. The result of Omphale is a Cyclo Static DataFlow (CSDF) model and a task graph where tasks communicate via sliding windows that are located in circular buffers. The CSDF model is used to determine the size of the buffers and the communication pattern of the data. A buffer must fit in the SPM of the processing unit that is reading from it, such that low latency access is realized with a minimized number of stall cycles. If a task and its buffer exceed the size of the SPM, the task is examined for additional parallelism or the circular buffer is partly located in a memory tile. This results in an extended task graph that satisfies the SPM size constraints.
Original languageUndefined
Place of PublicationEnschede
PublisherCentre for Telematics and Information Technology (CTIT)
Number of pages15
Publication statusPublished - 5 Jul 2007

Publication series

NameCTIT Technical Report Series
PublisherCentre for Telematics and Information Technology, University of Twente
No.LNCS4549/TR-CTIT-07-44
ISSN (Print)1381-3625

Keywords

  • EWI-10725
  • CAES-EEA: Efficient Embedded Architectures
  • METIS-242188
  • IR-64232
  • Task Graph
  • Cyclo Static DataFlow model
  • Nested Loop Program
  • Scratch Pad Memory
  • Circular Buffers

Cite this

Bijlsma, T., Bekooij, M. J. G., Smit, G. J. M., & Jansen, P. G. (2007). Omphale: Streamlining the Communication for Jobs in a Multi Processor System on Chip. (CTIT Technical Report Series; No. LNCS4549/TR-CTIT-07-44). Enschede: Centre for Telematics and Information Technology (CTIT).
Bijlsma, T. ; Bekooij, Marco Jan Gerrit ; Smit, Gerardus Johannes Maria ; Jansen, P.G. / Omphale: Streamlining the Communication for Jobs in a Multi Processor System on Chip. Enschede : Centre for Telematics and Information Technology (CTIT), 2007. 15 p. (CTIT Technical Report Series; LNCS4549/TR-CTIT-07-44).
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abstract = "Our Multi Processor System on Chip (MPSoC) template provides processing tiles that are connected via a network on chip. A processing tile contains a processing unit and a Scratch Pad Memory (SPM). This paper presents the Omphale tool that performs the first step in mapping a job, represented by a task graph, to such an MPSoC, given the SPM sizes as constraints. Furthermore a memory tile is introduced. The result of Omphale is a Cyclo Static DataFlow (CSDF) model and a task graph where tasks communicate via sliding windows that are located in circular buffers. The CSDF model is used to determine the size of the buffers and the communication pattern of the data. A buffer must fit in the SPM of the processing unit that is reading from it, such that low latency access is realized with a minimized number of stall cycles. If a task and its buffer exceed the size of the SPM, the task is examined for additional parallelism or the circular buffer is partly located in a memory tile. This results in an extended task graph that satisfies the SPM size constraints.",
keywords = "EWI-10725, CAES-EEA: Efficient Embedded Architectures, METIS-242188, IR-64232, Task Graph, Cyclo Static DataFlow model, Nested Loop Program, Scratch Pad Memory, Circular Buffers",
author = "T. Bijlsma and Bekooij, {Marco Jan Gerrit} and Smit, {Gerardus Johannes Maria} and P.G. Jansen",
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Bijlsma, T, Bekooij, MJG, Smit, GJM & Jansen, PG 2007, Omphale: Streamlining the Communication for Jobs in a Multi Processor System on Chip. CTIT Technical Report Series, no. LNCS4549/TR-CTIT-07-44, Centre for Telematics and Information Technology (CTIT), Enschede.

Omphale: Streamlining the Communication for Jobs in a Multi Processor System on Chip. / Bijlsma, T.; Bekooij, Marco Jan Gerrit; Smit, Gerardus Johannes Maria; Jansen, P.G.

Enschede : Centre for Telematics and Information Technology (CTIT), 2007. 15 p. (CTIT Technical Report Series; No. LNCS4549/TR-CTIT-07-44).

Research output: Book/ReportReportProfessional

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AB - Our Multi Processor System on Chip (MPSoC) template provides processing tiles that are connected via a network on chip. A processing tile contains a processing unit and a Scratch Pad Memory (SPM). This paper presents the Omphale tool that performs the first step in mapping a job, represented by a task graph, to such an MPSoC, given the SPM sizes as constraints. Furthermore a memory tile is introduced. The result of Omphale is a Cyclo Static DataFlow (CSDF) model and a task graph where tasks communicate via sliding windows that are located in circular buffers. The CSDF model is used to determine the size of the buffers and the communication pattern of the data. A buffer must fit in the SPM of the processing unit that is reading from it, such that low latency access is realized with a minimized number of stall cycles. If a task and its buffer exceed the size of the SPM, the task is examined for additional parallelism or the circular buffer is partly located in a memory tile. This results in an extended task graph that satisfies the SPM size constraints.

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Bijlsma T, Bekooij MJG, Smit GJM, Jansen PG. Omphale: Streamlining the Communication for Jobs in a Multi Processor System on Chip. Enschede: Centre for Telematics and Information Technology (CTIT), 2007. 15 p. (CTIT Technical Report Series; LNCS4549/TR-CTIT-07-44).