On-Chip Tap Delay Measurements for a Digital Delay Line Used in High-Speed Inter-Chip Data Communications

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    6 Citations (Scopus)
    Original languageUndefined
    Title of host publicationProceedings of the Eleventh Asian Test Symposium
    Place of PublicationGuam, USA
    Pages122-127
    Number of pages6
    Publication statusPublished - 18 Nov 2002

    Keywords

    • METIS-208789

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