On the reduction of the third order distortion in a CMOS triode transconductor

Clemens Mensink, Clemens H.J. Mensink, Eric A.M. Klumperink, Bram Nauta

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    Abstract

    This paper presents a linearisation technique which aims to cancel out the third order distortion of a CMOS triode transconductor due to the mobility reduction effect of the conversion transistors. The transconductor consist of a parallel operating voltage and current biased differential pair. It is realised in a 0.8 ¿m CMOS process. Simulation results, obtained with state-of-the-art MOS models, show a significant deviation from the measurement results. It is shown that the third order distortion prediction of the generally used `&thetas;-model' for mobility reduction is rather poor in the triode region
    Original languageUndefined
    Title of host publicationProceedings of the 1996 IEEE International Symposium on Circuits and Systems
    Place of PublicationAtlanta, U.S.A.
    PublisherIEEE
    Pages223-226
    ISBN (Print)9780780330733
    DOIs
    Publication statusPublished - 12 May 1996

    Publication series

    Name
    PublisherIEEE
    Volume1

    Keywords

    • METIS-112857
    • IR-15975

    Cite this

    Mensink, C., Mensink, C. H. J., Klumperink, E. A. M., & Nauta, B. (1996). On the reduction of the third order distortion in a CMOS triode transconductor. In Proceedings of the 1996 IEEE International Symposium on Circuits and Systems (pp. 223-226). Atlanta, U.S.A.: IEEE. https://doi.org/10.1109/ISCAS.1996.539869