On the reduction of the third order distortion in a CMOS triode transconductor

Clemens Mensink; Clemens H.J. Mensink; Eric A.M. Klumperink; Bram Nauta

doi:10.1109/ISCAS.1996.539869

On the reduction of the third order distortion in a CMOS triode transconductor

Clemens Mensink, Clemens H.J. Mensink, Eric A.M. Klumperink, Bram Nauta

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

5 Citations (Scopus)

299 Downloads (Pure)

Abstract

This paper presents a linearisation technique which aims to cancel out the third order distortion of a CMOS triode transconductor due to the mobility reduction effect of the conversion transistors. The transconductor consist of a parallel operating voltage and current biased differential pair. It is realised in a 0.8 ¿m CMOS process. Simulation results, obtained with state-of-the-art MOS models, show a significant deviation from the measurement results. It is shown that the third order distortion prediction of the generally used `&thetas;-model' for mobility reduction is rather poor in the triode region

Original language	Undefined
Title of host publication	Proceedings of the 1996 IEEE International Symposium on Circuits and Systems
Place of Publication	Atlanta, U.S.A.
Publisher	IEEE
Pages	223-226
ISBN (Print)	9780780330733
DOIs	https://doi.org/10.1109/ISCAS.1996.539869
Publication status	Published - 12 May 1996
Event	IEEE International Symposium on Circuits and Systems, ISCAS 1996 - Atlanta, Georgia, USA Duration: 12 May 1996 → 15 May 1996

Publication series

Name
Publisher	IEEE
Volume	1

Conference

Conference	IEEE International Symposium on Circuits and Systems, ISCAS 1996
Period	12/05/96 → 15/05/96
Other	May 12-15, 1996

Keywords

METIS-112857
IR-15975

Access to Document

10.1109/ISCAS.1996.539869

00539869

Cite this

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title = "On the reduction of the third order distortion in a CMOS triode transconductor",

abstract = "This paper presents a linearisation technique which aims to cancel out the third order distortion of a CMOS triode transconductor due to the mobility reduction effect of the conversion transistors. The transconductor consist of a parallel operating voltage and current biased differential pair. It is realised in a 0.8 ¿m CMOS process. Simulation results, obtained with state-of-the-art MOS models, show a significant deviation from the measurement results. It is shown that the third order distortion prediction of the generally used `&thetas;-model' for mobility reduction is rather poor in the triode region",

keywords = "METIS-112857, IR-15975",

author = "Clemens Mensink and Mensink, {Clemens H.J.} and Klumperink, {Eric A.M.} and Bram Nauta",

year = "1996",

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day = "12",

doi = "10.1109/ISCAS.1996.539869",

language = "Undefined",

isbn = "9780780330733",

publisher = "IEEE",

pages = "223--226",

booktitle = "Proceedings of the 1996 IEEE International Symposium on Circuits and Systems",

address = "United States",

note = "IEEE International Symposium on Circuits and Systems, ISCAS 1996 ; Conference date: 12-05-1996 Through 15-05-1996",

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Mensink, C, Mensink, CHJ, Klumperink, EAM & Nauta, B 1996, On the reduction of the third order distortion in a CMOS triode transconductor. in Proceedings of the 1996 IEEE International Symposium on Circuits and Systems. IEEE, Atlanta, U.S.A., pp. 223-226, IEEE International Symposium on Circuits and Systems, ISCAS 1996, 12/05/96. https://doi.org/10.1109/ISCAS.1996.539869

On the reduction of the third order distortion in a CMOS triode transconductor. / Mensink, Clemens; Mensink, Clemens H.J.; Klumperink, Eric A.M. et al.
Proceedings of the 1996 IEEE International Symposium on Circuits and Systems. Atlanta, U.S.A.: IEEE, 1996. p. 223-226.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

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AU - Nauta, Bram

PY - 1996/5/12

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N2 - This paper presents a linearisation technique which aims to cancel out the third order distortion of a CMOS triode transconductor due to the mobility reduction effect of the conversion transistors. The transconductor consist of a parallel operating voltage and current biased differential pair. It is realised in a 0.8 ¿m CMOS process. Simulation results, obtained with state-of-the-art MOS models, show a significant deviation from the measurement results. It is shown that the third order distortion prediction of the generally used `&thetas;-model' for mobility reduction is rather poor in the triode region

AB - This paper presents a linearisation technique which aims to cancel out the third order distortion of a CMOS triode transconductor due to the mobility reduction effect of the conversion transistors. The transconductor consist of a parallel operating voltage and current biased differential pair. It is realised in a 0.8 ¿m CMOS process. Simulation results, obtained with state-of-the-art MOS models, show a significant deviation from the measurement results. It is shown that the third order distortion prediction of the generally used `&thetas;-model' for mobility reduction is rather poor in the triode region

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KW - IR-15975

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