Abstract
Abstract—CMOS radio receiver architectures, based on radio
frequency (RF) sampling followed by discrete-time (D-T) signal
processing via switched-capacitor circuits, have recently been
proposed for dedicated radio standards. This paper explores the
suitability of such D-T receivers for highly flexible softwaredefined
radio (SDR) receivers. Via symbolic analysis and
simulations we analyze the properties of D-T receivers, and
show that at least three challenges exist to make a D-T receiver
work for SDR: 1) the sampling clock frequency is related to the
radio frequency, complicating baseband filter design; 2) a
frequency-dependent phase shift is introduced by pseudoquadrature
and pseudo-differential sampling; 3) the conversion
gain of a charge sampling front-end is strongly frequencydependent.
Compared to a mixer based radio receiver, extra
costs are needed to solve these problems.
| Original language | English |
|---|---|
| Title of host publication | 2007 IEEE International Symposium on Circuits and Systems |
| Place of Publication | Piscataway |
| Publisher | IEEE |
| Pages | 2522-2525 |
| Number of pages | 4 |
| ISBN (Print) | 1-4244-0921-7 |
| DOIs | |
| Publication status | Published - 29 May 2007 |
| Event | IEEE International Symposium on Circuits and Systems, ISCAS 2007 - New Orleans, United States Duration: 27 May 2007 → 30 May 2007 http://www.iscas2007.org/ |
Conference
| Conference | IEEE International Symposium on Circuits and Systems, ISCAS 2007 |
|---|---|
| Abbreviated title | ISCAS 2007 |
| Country/Territory | United States |
| City | New Orleans |
| Period | 27/05/07 → 30/05/07 |
| Internet address |
Keywords
- EWI-10894
- IR-58148
- METIS-241847