An integrator circuit comprises an operational amplifier which has a transistor stage (1) with an input terminal (4) and an output terminal (3), a feedback capacitor (2) connected between the input terminal (4) and the output terminal (3), and a resistor (5) connected to the input terminal (4), and also has an additional circuit branch (20) comprising a second capacitor (22) and a second resistor (25) connected in series one with the other and connected between the output terminal (3) of the transistor stage (1) and voltage comprising the inverted input voltage to the integrator circuit. Preferably two additional circuit branches (320, 320') are provided. One may be connected between the non-inverting or positive output terminal (33) of the transistor stage (1) and the inverting or negative input of the integrator. The other circuit may be connected between the negative output terminal (37) of the transistor stage (1) and the positive input of the integrator. This is particularly useful for balanced amplifier topology. The invention finds particular application in the first filter stage (integrator) in a sigma delta analog to digital conversion circuits and provide an improved operational amplifier integrator and particularly helps in compensating for a right halfplane zero.
|Publication status||Submitted - 1 Apr 2003|