Optimization of nitridation conditions for high quality inter-polysilicon dielectric layers

J.H. Klootwijk, H.J. Bergveld, H. van Kranenburg, P.H. Woerlee, Hans Wallinga

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    Abstract

    Nitridation of deposited high temperature oxides (HTO) was studied to form high quality inter-polysilicon dielectric layers for embedded non volatile memories. Good quality dielectric layers were obtained earlier by using an optimized deposition of polysilicon and by performing a post-dielectric anneal in a rapid thermal processor. In the present paper the quality is further improved by means of optimization of the post-dielectric anneal. The influence of temperature, time and pressure during annealing on the electrical properties is investigated. Electrical characterization by means of charge-to-breakdown (Qbd) and I-V measurements on simple capacitor structures evaluates the electrical properties of the layers. It is shown that an (optimized) rapid thermal N2O anneal leads to a very high charge to breakdown (Qbd ¿ 25 C/cm2), low charge trapping and low leakage currents.
    Original languageEnglish
    Title of host publicationESSDERC '96: proceedings of the 26th European Solid State Device Research Conference, 1996
    Place of PublicationPiscataway, NJ, USA
    PublisherIEEE
    Pages369-372
    ISBN (Print)2-86332-196-X
    Publication statusPublished - 9 Sep 1996
    Event26th European Solid State Device Research Conference, ESSDERC 1996 - Bologna, Italy
    Duration: 9 Sep 199611 Sep 1996
    Conference number: 26

    Publication series

    Name
    PublisherIEEE

    Conference

    Conference26th European Solid State Device Research Conference, ESSDERC 1996
    Abbreviated titleESSDERC
    CountryItaly
    CityBologna
    Period9/09/9611/09/96

    Keywords

    • METIS-113861
    • IR-96429

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