Parallel graph reduction for divide-and-conquer applications -- Part II: program performance

Pieter H. Hartel, Willem G. Vree

Research output: Book/ReportReportOther research output

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Abstract

An extensible machine architecture is devised to efficiently support a parallel reduction model of computation. The organisation of the machine is designed to match the behaviour of the application programs. A pilot implementation of the architecture is used to obtain an execution profile of the various applications. These profiles are used with a performance model to calculate optimal schedules of the applications. The resulting speedup figures give an upper bound for the performance gain that may be attained on a full implementation of the architecture. The most important result is that each application allows for a processor utilisation of over 50% to be attained on our parallel architecture.
Original languageUndefined
Place of PublicationAmsterdam, the Netherlands
PublisherUniversity of Amsterdam
Number of pages27
Publication statusPublished - Dec 1988

Publication series

NamePRM project internal report
PublisherUniversity of Amsterdam
No.D-20

Keywords

  • IR-68208
  • EWI-16202

Cite this

Hartel, P. H., & Vree, W. G. (1988). Parallel graph reduction for divide-and-conquer applications -- Part II: program performance. (PRM project internal report; No. D-20). Amsterdam, the Netherlands: University of Amsterdam.
Hartel, Pieter H. ; Vree, Willem G. / Parallel graph reduction for divide-and-conquer applications -- Part II: program performance. Amsterdam, the Netherlands : University of Amsterdam, 1988. 27 p. (PRM project internal report; D-20).
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publisher = "University of Amsterdam",
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Hartel, PH & Vree, WG 1988, Parallel graph reduction for divide-and-conquer applications -- Part II: program performance. PRM project internal report, no. D-20, University of Amsterdam, Amsterdam, the Netherlands.

Parallel graph reduction for divide-and-conquer applications -- Part II: program performance. / Hartel, Pieter H.; Vree, Willem G.

Amsterdam, the Netherlands : University of Amsterdam, 1988. 27 p. (PRM project internal report; No. D-20).

Research output: Book/ReportReportOther research output

TY - BOOK

T1 - Parallel graph reduction for divide-and-conquer applications -- Part II: program performance

AU - Hartel, Pieter H.

AU - Vree, Willem G.

PY - 1988/12

Y1 - 1988/12

N2 - An extensible machine architecture is devised to efficiently support a parallel reduction model of computation. The organisation of the machine is designed to match the behaviour of the application programs. A pilot implementation of the architecture is used to obtain an execution profile of the various applications. These profiles are used with a performance model to calculate optimal schedules of the applications. The resulting speedup figures give an upper bound for the performance gain that may be attained on a full implementation of the architecture. The most important result is that each application allows for a processor utilisation of over 50% to be attained on our parallel architecture.

AB - An extensible machine architecture is devised to efficiently support a parallel reduction model of computation. The organisation of the machine is designed to match the behaviour of the application programs. A pilot implementation of the architecture is used to obtain an execution profile of the various applications. These profiles are used with a performance model to calculate optimal schedules of the applications. The resulting speedup figures give an upper bound for the performance gain that may be attained on a full implementation of the architecture. The most important result is that each application allows for a processor utilisation of over 50% to be attained on our parallel architecture.

KW - IR-68208

KW - EWI-16202

M3 - Report

T3 - PRM project internal report

BT - Parallel graph reduction for divide-and-conquer applications -- Part II: program performance

PB - University of Amsterdam

CY - Amsterdam, the Netherlands

ER -

Hartel PH, Vree WG. Parallel graph reduction for divide-and-conquer applications -- Part II: program performance. Amsterdam, the Netherlands: University of Amsterdam, 1988. 27 p. (PRM project internal report; D-20).