@book{4e4140e511e04d52b5e3680df6665599,
title = "Parallel graph reduction for divide-and-conquer applications -- Part II: program performance",
abstract = "An extensible machine architecture is devised to efficiently support a parallel reduction model of computation. The organisation of the machine is designed to match the behaviour of the application programs. A pilot implementation of the architecture is used to obtain an execution profile of the various applications. These profiles are used with a performance model to calculate optimal schedules of the applications. The resulting speedup figures give an upper bound for the performance gain that may be attained on a full implementation of the architecture. The most important result is that each application allows for a processor utilisation of over 50% to be attained on our parallel architecture.",
keywords = "IR-68208, EWI-16202",
author = "Hartel, {Pieter H.} and Vree, {Willem G.}",
year = "1988",
month = dec,
language = "Undefined",
series = "PRM project internal report",
publisher = "University of Amsterdam",
number = "D-20",
}