Parasitics Analysis in the Power and Gate Driver Loops and Impact on the Ringing of SiC MOSFETs

Desmon Simatupang; Ilman Sulaeman; Niek Moonen; Jelena Popovic; Frank Leferink

doi:10.1109/APEMC49932.2021.9597121

Parasitics Analysis in the Power and Gate Driver Loops and Impact on the Ringing of SiC MOSFETs

Desmon Simatupang
, Ilman Sulaeman
, Niek Moonen
, Jelena Popovic
, Frank Leferink

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

2 Citations (Scopus)

1038 Downloads (Pure)

Abstract

This paper analyzes the behavior of transient switching silicon carbide devices influenced by the parasitics of printed circuit board and the component itself. The parasitics in power and gate driver loops are described and investigated. Double pulse test simulations for silicon carbide devices are conducted in this report and verified through the circuit simulation. The parasitics in the printed circuit board are added based on the real experience printed circuit board design and the parasitics in silicon carbide devices are added based on the manufacturer modelling. The parasitic inductances in the simulation are varied 30% to understand the effect of the parasitics. The drain and source parasitic inductances and the gate parasitic resistance are simulated separately to understand the individual effect on the ringing of silicon carbide devices. The ringing impact on the reliability of devices is also analyzed in this paper.

Original language	English
Title of host publication	Proceedings 2021 Asia-Pacific International Symposium on Electromagnetic Compatibility, APEMC 2021
Place of Publication	Piscataway, NJ
Publisher	IEEE
Number of pages	4
ISBN (Electronic)	978-1-7281-7621-5
ISBN (Print)	978-1-7281-7622-2
DOIs	https://doi.org/10.1109/APEMC49932.2021.9597121
Publication status	Published - 16 Nov 2021
Event	2021 Asia-Pacific International Symposium on Electromagnetic Compatibility, APEMC 2021 - Merusaka Nusa, Nusa Dua, Bali, Indonesia Duration: 27 Sept 2021 → 30 Sept 2021 https://apemc2021.org/

Publication series

Name	Proceedings Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC)
Publisher	IEEE
Volume	2021
ISSN (Print)	2162-7673
ISSN (Electronic)	2640-7469

Conference

Conference	2021 Asia-Pacific International Symposium on Electromagnetic Compatibility, APEMC 2021
Abbreviated title	APEMC
Country/Territory	Indonesia
City	Nusa Dua, Bali
Period	27/09/21 → 30/09/21
Internet address	https://apemc2021.org/

Keywords

Parasitics
Ringing
Silicon carbide (SiC)
22/1 OA procedure

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10.1109/APEMC49932.2021.9597121

ArticleFinal published version, 579 KBLicence: Taverne

Cite this

Simatupang, D., Sulaeman, I., Moonen, N., Popovic, J., & Leferink, F. (2021). Parasitics Analysis in the Power and Gate Driver Loops and Impact on the Ringing of SiC MOSFETs. In Proceedings 2021 Asia-Pacific International Symposium on Electromagnetic Compatibility, APEMC 2021 Article 9597121 (Proceedings Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC); Vol. 2021). IEEE. https://doi.org/10.1109/APEMC49932.2021.9597121

Simatupang, Desmon ; Sulaeman, Ilman ; Moonen, Niek et al. / Parasitics Analysis in the Power and Gate Driver Loops and Impact on the Ringing of SiC MOSFETs. Proceedings 2021 Asia-Pacific International Symposium on Electromagnetic Compatibility, APEMC 2021. Piscataway, NJ : IEEE, 2021. (Proceedings Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC)).

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title = "Parasitics Analysis in the Power and Gate Driver Loops and Impact on the Ringing of SiC MOSFETs",

abstract = "This paper analyzes the behavior of transient switching silicon carbide devices influenced by the parasitics of printed circuit board and the component itself. The parasitics in power and gate driver loops are described and investigated. Double pulse test simulations for silicon carbide devices are conducted in this report and verified through the circuit simulation. The parasitics in the printed circuit board are added based on the real experience printed circuit board design and the parasitics in silicon carbide devices are added based on the manufacturer modelling. The parasitic inductances in the simulation are varied 30\% to understand the effect of the parasitics. The drain and source parasitic inductances and the gate parasitic resistance are simulated separately to understand the individual effect on the ringing of silicon carbide devices. The ringing impact on the reliability of devices is also analyzed in this paper. ",

keywords = "Parasitics, Ringing, Silicon carbide (SiC), 22/1 OA procedure",

author = "Desmon Simatupang and Ilman Sulaeman and Niek Moonen and Jelena Popovic and Frank Leferink",

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doi = "10.1109/APEMC49932.2021.9597121",

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Simatupang, D, Sulaeman, I, Moonen, N, Popovic, J & Leferink, F 2021, Parasitics Analysis in the Power and Gate Driver Loops and Impact on the Ringing of SiC MOSFETs. in Proceedings 2021 Asia-Pacific International Symposium on Electromagnetic Compatibility, APEMC 2021., 9597121, Proceedings Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC), vol. 2021, IEEE, Piscataway, NJ, 2021 Asia-Pacific International Symposium on Electromagnetic Compatibility, APEMC 2021, Nusa Dua, Bali, Indonesia, 27/09/21. https://doi.org/10.1109/APEMC49932.2021.9597121

Parasitics Analysis in the Power and Gate Driver Loops and Impact on the Ringing of SiC MOSFETs. / Simatupang, Desmon; Sulaeman, Ilman; Moonen, Niek et al.
Proceedings 2021 Asia-Pacific International Symposium on Electromagnetic Compatibility, APEMC 2021. Piscataway, NJ: IEEE, 2021. 9597121 (Proceedings Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC); Vol. 2021).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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AU - Simatupang, Desmon

AU - Sulaeman, Ilman

AU - Moonen, Niek

AU - Popovic, Jelena

AU - Leferink, Frank

PY - 2021/11/16

Y1 - 2021/11/16

N2 - This paper analyzes the behavior of transient switching silicon carbide devices influenced by the parasitics of printed circuit board and the component itself. The parasitics in power and gate driver loops are described and investigated. Double pulse test simulations for silicon carbide devices are conducted in this report and verified through the circuit simulation. The parasitics in the printed circuit board are added based on the real experience printed circuit board design and the parasitics in silicon carbide devices are added based on the manufacturer modelling. The parasitic inductances in the simulation are varied 30% to understand the effect of the parasitics. The drain and source parasitic inductances and the gate parasitic resistance are simulated separately to understand the individual effect on the ringing of silicon carbide devices. The ringing impact on the reliability of devices is also analyzed in this paper.

AB - This paper analyzes the behavior of transient switching silicon carbide devices influenced by the parasitics of printed circuit board and the component itself. The parasitics in power and gate driver loops are described and investigated. Double pulse test simulations for silicon carbide devices are conducted in this report and verified through the circuit simulation. The parasitics in the printed circuit board are added based on the real experience printed circuit board design and the parasitics in silicon carbide devices are added based on the manufacturer modelling. The parasitic inductances in the simulation are varied 30% to understand the effect of the parasitics. The drain and source parasitic inductances and the gate parasitic resistance are simulated separately to understand the individual effect on the ringing of silicon carbide devices. The ringing impact on the reliability of devices is also analyzed in this paper.

KW - Parasitics

KW - Ringing

KW - Silicon carbide (SiC)

KW - 22/1 OA procedure

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M3 - Conference contribution

AN - SCOPUS:85123432188

SN - 978-1-7281-7622-2

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ER -

Simatupang D, Sulaeman I, Moonen N, Popovic J, Leferink F. Parasitics Analysis in the Power and Gate Driver Loops and Impact on the Ringing of SiC MOSFETs. In Proceedings 2021 Asia-Pacific International Symposium on Electromagnetic Compatibility, APEMC 2021. Piscataway, NJ: IEEE. 2021. 9597121. (Proceedings Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC)). doi: 10.1109/APEMC49932.2021.9597121

Parasitics Analysis in the Power and Gate Driver Loops and Impact on the Ringing of SiC MOSFETs

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