Phase locked loop

R.C.H. van de Beek; Eric A.M. Klumperink; Bram Nauta; C.S. Vaucher

Phase locked loop

R.C.H. van de Beek (Inventor), Eric A.M. Klumperink (Inventor), Bram Nauta (Inventor), C.S. Vaucher (Inventor)

Research output: Patent

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Abstract

Abstract of US2006164137 A phase locked loop comprising a phase detector ( 100 ) for determining a phase difference between a reference signal (Ref) and mutually phase shifted signals (I, Q) to generate frequency control signals (U, D), the phase detector ( 100 ) comprising: means ( 10 ) for obtaining a first one of said frequency control signals (U, D) by binary multiplication of the reference signal (Ref) and one of the relative phase shifted signals (I, Q); and means ( 20 ) for obtaining a second one of said frequency control signals (U, D) by binary multiplication of the relative phase shifted signals (I, Q).

Original language	Undefined
Patent number	US2006 0164137A1
Priority date	31/07/03
Publication status	Published - 27 Jul 2006

Keywords

METIS-248464
EWI-8928

Access to Document

US2006164137A1

http://v3.espacenet.com/publicationDetails/originalDocument?FT=D&date=20060727&DB=EPODOC&locale=en_V3&CC=US&NR=2006164137A1&KC=A1

1 Patent

Phase locked loop
van de Beek, R. C. H. (Inventor), Klumperink, E. A. M. (Inventor), Nauta, B. (Inventor) & Vaucher, C. S. (Inventor), 15 May 2007, Patent No. US7218157 B2, Priority date 31 Jul 2003
Research output: Patent

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Cite this

@misc{3333b8266f3944f89783d64ecf17bcd9,

title = "Phase locked loop",

abstract = "Abstract of US2006164137 A phase locked loop comprising a phase detector ( 100 ) for determining a phase difference between a reference signal (Ref) and mutually phase shifted signals (I, Q) to generate frequency control signals (U, D), the phase detector ( 100 ) comprising: means ( 10 ) for obtaining a first one of said frequency control signals (U, D) by binary multiplication of the reference signal (Ref) and one of the relative phase shifted signals (I, Q); and means ( 20 ) for obtaining a second one of said frequency control signals (U, D) by binary multiplication of the relative phase shifted signals (I, Q).",

keywords = "METIS-248464, EWI-8928",

author = "{van de Beek}, R.C.H. and Klumperink, {Eric A.M.} and Bram Nauta and C.S. Vaucher",

year = "2006",

month = jul,

day = "27",

language = "Undefined",

type = "Patent",

note = "US2006 0164137A1",

}

TY - PAT

T1 - Phase locked loop

AU - van de Beek, R.C.H.

AU - Klumperink, Eric A.M.

AU - Nauta, Bram

AU - Vaucher, C.S.

PY - 2006/7/27

Y1 - 2006/7/27

N2 - Abstract of US2006164137 A phase locked loop comprising a phase detector ( 100 ) for determining a phase difference between a reference signal (Ref) and mutually phase shifted signals (I, Q) to generate frequency control signals (U, D), the phase detector ( 100 ) comprising: means ( 10 ) for obtaining a first one of said frequency control signals (U, D) by binary multiplication of the reference signal (Ref) and one of the relative phase shifted signals (I, Q); and means ( 20 ) for obtaining a second one of said frequency control signals (U, D) by binary multiplication of the relative phase shifted signals (I, Q).

AB - Abstract of US2006164137 A phase locked loop comprising a phase detector ( 100 ) for determining a phase difference between a reference signal (Ref) and mutually phase shifted signals (I, Q) to generate frequency control signals (U, D), the phase detector ( 100 ) comprising: means ( 10 ) for obtaining a first one of said frequency control signals (U, D) by binary multiplication of the reference signal (Ref) and one of the relative phase shifted signals (I, Q); and means ( 20 ) for obtaining a second one of said frequency control signals (U, D) by binary multiplication of the relative phase shifted signals (I, Q).

KW - METIS-248464

KW - EWI-8928

M3 - Patent

M1 - US2006 0164137A1

ER -