Phase-locked loop including sampling phase detector and charge pump with pulse width control

X. Gao (Inventor), Eric A.M. Klumperink (Inventor), Bram Nauta (Inventor), M. Bohsali (Inventor), A. Kiaei (Inventor), G. Socci (Inventor), A. Djabbari (Inventor)

    Research output: Patent

    19 Downloads (Pure)

    Abstract

    Phase-locked loop (PLL) circuitry in which a sampling phase detector samples the output signal in accordance with the reference signal and a frequency detector detects the output signal frequency in accordance with the reference signal.
    Original languageUndefined
    Patent numberUS20080044522
    Priority date15/06/10
    Publication statusSubmitted - 7 Mar 2008

    Keywords

    • METIS-270685
    • EWI-15038

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