Abstract
Porting software to different platforms can require modifications of the application. One of the issues is that the targeted hardware supports another memory consistency model. As a consequence, the completion order of reads and writes in a multi-threaded application can change, which may result in improper synchronization. For example, a processor with out-of-order execution could break synchronization if proper fence instructions are missing. Such a bug can cause sporadic errors, which are hard to debug.
This paper presents an approach that makes applications independent of the memory model of the hardware, hence they can be compiled to hardware with any memory architecture. The key is having a memory model that only guarantees the most fundamental orderings of reads and writes, and annotations to specify additional ordering constraints. As a result, tooling can transparently and properly implement fences, cache flushes, etc. when appropriate, without losing flexibility of the hardware design. In a case study, several SPLASH-2 applications are run on a 32-core software cache coherent MicroBlaze system in FPGA. Moreover, this approach also allows mapping to scratch-pad memories and a distributed shared memory architecture.
Original language | Undefined |
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Title of host publication | Proceedings of the 27th IEEE International Parallel and Distributed Processing Symposium (IPDPS 2013) - 20th Reconfigurable Architectures Workshop (RAW 2013) |
Place of Publication | USA |
Publisher | IEEE |
Pages | 212-221 |
Number of pages | 10 |
ISBN (Print) | 978-0-7695-4979-8 |
DOIs | |
Publication status | Published - 21 May 2013 |
Event | 20th Reconfigurable Architectures Workshop, RAW 2013 - Boston, United States Duration: 20 May 2013 → 24 May 2013 Conference number: 20 http://www.ece.lsu.edu/vaidy/raw13/ |
Publication series
Name | |
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Publisher | IEEE Computer Society |
Workshop
Workshop | 20th Reconfigurable Architectures Workshop, RAW 2013 |
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Abbreviated title | RAW |
Country/Territory | United States |
City | Boston |
Period | 20/05/13 → 24/05/13 |
Internet address |
Keywords
- EWI-23363
- IR-86199
- METIS-297648
- CAES-EEA: Efficient Embedded Architectures