Power analysis on smartcard algorithms using simulation

G. Hollestelle, W. Burgers, Jeremy den Hartog

    Research output: Book/ReportReportProfessional

    67 Downloads (Pure)

    Abstract

    This paper presents the results from a power analysis of the AES and RSA algorithms by simulation using the PINPAS tool. The PINPAS tool is capable of simulating the power consumption of assembler programs implemented in, amongst others, Hitachi H8/300 assembler. The Hitachi H8/300 is a popular CPU for smartcards. Using the PINPAS tool, the vulnerability for power analysis attacks of straightforward AES and RSA implementations is examined. In case a vulnerability is found countermeasures are added to the implementation that attempt to counter power analysis attacks. After these modifications the analysis is performed again and the new results are compared to the original results.
    Original languageUndefined
    Place of PublicationEindhoven
    PublisherEindhoven University of Technology
    Publication statusPublished - 2004

    Publication series

    NameCSR-04
    PublisherEindhoven University of Technology
    No.22

    Keywords

    • METIS-222218
    • IR-66569
    • EWI-798

    Cite this

    Hollestelle, G., Burgers, W., & den Hartog, J. (2004). Power analysis on smartcard algorithms using simulation. (CSR-04; No. 22). Eindhoven: Eindhoven University of Technology.
    Hollestelle, G. ; Burgers, W. ; den Hartog, Jeremy. / Power analysis on smartcard algorithms using simulation. Eindhoven : Eindhoven University of Technology, 2004. (CSR-04; 22).
    @book{5a2b9b1385ce48588e811fe8e2392c48,
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    abstract = "This paper presents the results from a power analysis of the AES and RSA algorithms by simulation using the PINPAS tool. The PINPAS tool is capable of simulating the power consumption of assembler programs implemented in, amongst others, Hitachi H8/300 assembler. The Hitachi H8/300 is a popular CPU for smartcards. Using the PINPAS tool, the vulnerability for power analysis attacks of straightforward AES and RSA implementations is examined. In case a vulnerability is found countermeasures are added to the implementation that attempt to counter power analysis attacks. After these modifications the analysis is performed again and the new results are compared to the original results.",
    keywords = "METIS-222218, IR-66569, EWI-798",
    author = "G. Hollestelle and W. Burgers and {den Hartog}, Jeremy",
    note = "Imported from DIES",
    year = "2004",
    language = "Undefined",
    series = "CSR-04",
    publisher = "Eindhoven University of Technology",
    number = "22",

    }

    Hollestelle, G, Burgers, W & den Hartog, J 2004, Power analysis on smartcard algorithms using simulation. CSR-04, no. 22, Eindhoven University of Technology, Eindhoven.

    Power analysis on smartcard algorithms using simulation. / Hollestelle, G.; Burgers, W.; den Hartog, Jeremy.

    Eindhoven : Eindhoven University of Technology, 2004. (CSR-04; No. 22).

    Research output: Book/ReportReportProfessional

    TY - BOOK

    T1 - Power analysis on smartcard algorithms using simulation

    AU - Hollestelle, G.

    AU - Burgers, W.

    AU - den Hartog, Jeremy

    N1 - Imported from DIES

    PY - 2004

    Y1 - 2004

    N2 - This paper presents the results from a power analysis of the AES and RSA algorithms by simulation using the PINPAS tool. The PINPAS tool is capable of simulating the power consumption of assembler programs implemented in, amongst others, Hitachi H8/300 assembler. The Hitachi H8/300 is a popular CPU for smartcards. Using the PINPAS tool, the vulnerability for power analysis attacks of straightforward AES and RSA implementations is examined. In case a vulnerability is found countermeasures are added to the implementation that attempt to counter power analysis attacks. After these modifications the analysis is performed again and the new results are compared to the original results.

    AB - This paper presents the results from a power analysis of the AES and RSA algorithms by simulation using the PINPAS tool. The PINPAS tool is capable of simulating the power consumption of assembler programs implemented in, amongst others, Hitachi H8/300 assembler. The Hitachi H8/300 is a popular CPU for smartcards. Using the PINPAS tool, the vulnerability for power analysis attacks of straightforward AES and RSA implementations is examined. In case a vulnerability is found countermeasures are added to the implementation that attempt to counter power analysis attacks. After these modifications the analysis is performed again and the new results are compared to the original results.

    KW - METIS-222218

    KW - IR-66569

    KW - EWI-798

    M3 - Report

    T3 - CSR-04

    BT - Power analysis on smartcard algorithms using simulation

    PB - Eindhoven University of Technology

    CY - Eindhoven

    ER -

    Hollestelle G, Burgers W, den Hartog J. Power analysis on smartcard algorithms using simulation. Eindhoven: Eindhoven University of Technology, 2004. (CSR-04; 22).