Power Estimation Techniques for the Purpose of the Architectural Synthesis of Digital Signal Processing Algorithms

F.J. Rem, Sabih H. Gerez, Jaap Smit, A. Heubi, M. Ansorge, F. Pellandini

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    Original languageUndefined
    Title of host publicationProceedings of the ProRISC Workshop on Circuits, Systems and Signal Processing
    Place of PublicationMierlo, the Netherlands
    Number of pages10
    Publication statusPublished - 27 Nov 1997


    • METIS-114348

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