Power Estimation Techniques for the Purpose of the Architectural Synthesis of Digital Signal Processing Algorithms

F.J. Rem, Sabih H. Gerez, Jaap Smit, A. Heubi, M. Ansorge, F. Pellandini

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    Original languageUndefined
    Title of host publicationProceedings of the ProRISC Workshop on Circuits, Systems and Signal Processing
    Place of PublicationMierlo, the Netherlands
    Pages477-486
    Number of pages10
    Publication statusPublished - 27 Nov 1997

    Keywords

    • METIS-114348

    Cite this

    Rem, F. J., Gerez, S. H., Smit, J., Heubi, A., Ansorge, M., & Pellandini, F. (1997). Power Estimation Techniques for the Purpose of the Architectural Synthesis of Digital Signal Processing Algorithms. In Proceedings of the ProRISC Workshop on Circuits, Systems and Signal Processing (pp. 477-486). Mierlo, the Netherlands.