Research output per year
Research output per year
Awani Khodkumbhe*, Maikel Huiskamp, Ali Ghahremani, Bram Nauta, Anne J. Annema
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review
Power amplifiers (PAs) need digital predistortion (DPD) linearization to handle high-order complex modulation schemes in next-generation communication systems. While load variation is inevitable, DPD is generally designed considering only the nominal load impedance for PAs. This paper presents a polar class-E PA with an on-chip waveform characterizer enabling adaptive digital predistortion (ADPD) to preserve the linearity of the PA under load mismatch. The presented ADPD corrects both AM/AM and AM/PM distortions, which are prominent in the demonstrated PA, while simultaneously correcting for slow memory effects without the need for complex memory DPD algorithms. Load-pull measurements demonstrate that target error vector magnitude (EVM) and adjacent channel power ratio (ACPR) can be maintained in a significantly larger area on the Smith chart going from 50 Ω optimized static DPD to our ADPD for a 2 GHz 1024 QAM signal with 1 MSym/s symbol rate.
Original language | English |
---|---|
Title of host publication | 2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) |
Place of Publication | Los Angeles, USA |
Publisher | IEEE |
Pages | 295-298 |
Number of pages | 4 |
ISBN (Electronic) | 978-1-7281-6809-8 |
ISBN (Print) | 978-1-7281-6810-4 |
DOIs | |
Publication status | Published - 6 Aug 2020 |
Event | 2020 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2020 - Virtual event Duration: 4 Aug 2020 → 6 Aug 2020 |
Conference | 2020 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2020 |
---|---|
Period | 4/08/20 → 6/08/20 |
Research output: Contribution to journal › Article › Academic › peer-review