Preserving Polar Modulated Class-E Power Amplifier Linearity under Load Mismatch

Awani Khodkumbhe; Maikel  Huiskamp; Ali  Ghahremani; Bram  Nauta; Anne J. Annema

doi:10.1109/RFIC49505.2020.9218279

Preserving Polar Modulated Class-E Power Amplifier Linearity under Load Mismatch

Awani Khodkumbhe^*, Maikel Huiskamp, Ali Ghahremani, Bram Nauta, Anne J. Annema

^*Corresponding author for this work

Integrated Circuit Design

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

1 Citation (Scopus)

357 Downloads (Pure)

Abstract

Power amplifiers (PAs) need digital predistortion (DPD) linearization to handle high-order complex modulation schemes in next-generation communication systems. While load variation is inevitable, DPD is generally designed considering only the nominal load impedance for PAs. This paper presents a polar class-E PA with an on-chip waveform characterizer enabling adaptive digital predistortion (ADPD) to preserve the linearity of the PA under load mismatch. The presented ADPD corrects both AM/AM and AM/PM distortions, which are prominent in the demonstrated PA, while simultaneously correcting for slow memory effects without the need for complex memory DPD algorithms. Load-pull measurements demonstrate that target error vector magnitude (EVM) and adjacent channel power ratio (ACPR) can be maintained in a significantly larger area on the Smith chart going from 50 Ω optimized static DPD to our ADPD for a 2 GHz 1024 QAM signal with 1 MSym/s symbol rate.

Original language	English
Title of host publication	2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)
Place of Publication	Los Angeles, USA
Publisher	IEEE
Pages	295-298
Number of pages	4
ISBN (Electronic)	978-1-7281-6809-8
ISBN (Print)	978-1-7281-6810-4
DOIs	https://doi.org/10.1109/RFIC49505.2020.9218279
Publication status	Published - 6 Aug 2020
Event	2020 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2020 - Virtual event Duration: 4 Aug 2020 → 6 Aug 2020

Conference

Conference	2020 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2020
Period	4/08/20 → 6/08/20

Keywords

CMOS integrated circuits
Adaptive control
Antennas
Distortion
Impedance
Linearity
Power amplifiers
Predistortion
Quadrature amplitude modulation

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10.1109/RFIC49505.2020.9218279

Khodkumbhe2020preservingAccepted author version, 1.12 MB

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@inproceedings{406e87293b6f4a7b8902f28be4c6f42c,

title = "Preserving Polar Modulated Class-E Power Amplifier Linearity under Load Mismatch",

abstract = "Power amplifiers (PAs) need digital predistortion (DPD) linearization to handle high-order complex modulation schemes in next-generation communication systems. While load variation is inevitable, DPD is generally designed considering only the nominal load impedance for PAs. This paper presents a polar class-E PA with an on-chip waveform characterizer enabling adaptive digital predistortion (ADPD) to preserve the linearity of the PA under load mismatch. The presented ADPD corrects both AM/AM and AM/PM distortions, which are prominent in the demonstrated PA, while simultaneously correcting for slow memory effects without the need for complex memory DPD algorithms. Load-pull measurements demonstrate that target error vector magnitude (EVM) and adjacent channel power ratio (ACPR) can be maintained in a significantly larger area on the Smith chart going from 50 Ω optimized static DPD to our ADPD for a 2 GHz 1024 QAM signal with 1 MSym/s symbol rate.",

keywords = "CMOS integrated circuits, Adaptive control, Antennas, Distortion, Impedance, Linearity, Power amplifiers, Predistortion, Quadrature amplitude modulation",

author = "Awani Khodkumbhe and Maikel Huiskamp and Ali Ghahremani and Bram Nauta and Annema, {Anne J.}",

year = "2020",

month = aug,

day = "6",

doi = "10.1109/RFIC49505.2020.9218279",

language = "English",

isbn = "978-1-7281-6810-4",

pages = "295--298",

booktitle = "2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)",

publisher = "IEEE",

address = "United States",

note = "2020 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2020 ; Conference date: 04-08-2020 Through 06-08-2020",

}

Khodkumbhe, A, Huiskamp, M, Ghahremani, A, Nauta, B & Annema, AJ 2020, Preserving Polar Modulated Class-E Power Amplifier Linearity under Load Mismatch. in 2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)., 9218279, IEEE, Los Angeles, USA, pp. 295-298, 2020 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2020, 4/08/20. https://doi.org/10.1109/RFIC49505.2020.9218279

Preserving Polar Modulated Class-E Power Amplifier Linearity under Load Mismatch. / Khodkumbhe, Awani; Huiskamp, Maikel ; Ghahremani, Ali et al.
2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC). Los Angeles, USA: IEEE, 2020. p. 295-298 9218279.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - Preserving Polar Modulated Class-E Power Amplifier Linearity under Load Mismatch

AU - Khodkumbhe, Awani

AU - Huiskamp, Maikel

AU - Ghahremani, Ali

AU - Nauta, Bram

AU - Annema, Anne J.

PY - 2020/8/6

Y1 - 2020/8/6

N2 - Power amplifiers (PAs) need digital predistortion (DPD) linearization to handle high-order complex modulation schemes in next-generation communication systems. While load variation is inevitable, DPD is generally designed considering only the nominal load impedance for PAs. This paper presents a polar class-E PA with an on-chip waveform characterizer enabling adaptive digital predistortion (ADPD) to preserve the linearity of the PA under load mismatch. The presented ADPD corrects both AM/AM and AM/PM distortions, which are prominent in the demonstrated PA, while simultaneously correcting for slow memory effects without the need for complex memory DPD algorithms. Load-pull measurements demonstrate that target error vector magnitude (EVM) and adjacent channel power ratio (ACPR) can be maintained in a significantly larger area on the Smith chart going from 50 Ω optimized static DPD to our ADPD for a 2 GHz 1024 QAM signal with 1 MSym/s symbol rate.

AB - Power amplifiers (PAs) need digital predistortion (DPD) linearization to handle high-order complex modulation schemes in next-generation communication systems. While load variation is inevitable, DPD is generally designed considering only the nominal load impedance for PAs. This paper presents a polar class-E PA with an on-chip waveform characterizer enabling adaptive digital predistortion (ADPD) to preserve the linearity of the PA under load mismatch. The presented ADPD corrects both AM/AM and AM/PM distortions, which are prominent in the demonstrated PA, while simultaneously correcting for slow memory effects without the need for complex memory DPD algorithms. Load-pull measurements demonstrate that target error vector magnitude (EVM) and adjacent channel power ratio (ACPR) can be maintained in a significantly larger area on the Smith chart going from 50 Ω optimized static DPD to our ADPD for a 2 GHz 1024 QAM signal with 1 MSym/s symbol rate.

KW - CMOS integrated circuits

KW - Adaptive control

KW - Antennas

KW - Distortion

KW - Impedance

KW - Linearity

KW - Power amplifiers

KW - Predistortion

KW - Quadrature amplitude modulation

UR - http://www.scopus.com/inward/record.url?scp=85093934344&partnerID=8YFLogxK

U2 - 10.1109/RFIC49505.2020.9218279

DO - 10.1109/RFIC49505.2020.9218279

M3 - Conference contribution

SN - 978-1-7281-6810-4

SP - 295

EP - 298

BT - 2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)

PB - IEEE

CY - Los Angeles, USA

T2 - 2020 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2020

Y2 - 4 August 2020 through 6 August 2020

ER -

Preserving Polar Modulated Class-E Power Amplifier Linearity under Load Mismatch

Abstract

Conference

Keywords

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