Quadrature Sampling Mixer Topology for SAW-Less GPS Receivers in 0.18μm CMOS

Osamu Ikeuchi; Nobuo Saito; Bram Nauta

doi:10.1109/VLSIC.2010.5560309

Quadrature Sampling Mixer Topology for SAW-Less GPS Receivers in 0.18μm CMOS

Osamu Ikeuchi, Nobuo Saito, Bram Nauta

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

7 Citations (Scopus)

165 Downloads (Pure)

Abstract

This paper describes a new switching topology of a sampling mixer for SAW-less GPS (L1 band) receivers. The GPS receiver with the new mixer achieved NF 2.5dB and good blocking performance. In an alternative implementation, the mixer is stacked under a Quadrature VCO to reuse supply current. As a result, the current consumption of the GPS receiver is 11mA from 1.8V supply while maintaining blocking performance and NF of 3.5dB. Test chips are fabricated in 0.18μm CMOS process.

Original language	English
Title of host publication	IEEE Symposium on VLSI Circuits, VLSIC 2010
Place of Publication	Piscataway
Publisher	IEEE
Pages	177-178
Number of pages	2
ISBN (Print)	978-1-4244-5454-9
DOIs	https://doi.org/10.1109/VLSIC.2010.5560309
Publication status	Published - 17 Jun 2010
Event	2010 IEEE Symposium on VLSI Circuits, VLSIC 2010 - Honolulu, United States Duration: 16 Jun 2010 → 18 Jun 2010

Conference

Conference	2010 IEEE Symposium on VLSI Circuits, VLSIC 2010
Abbreviated title	VLSIC
Country/Territory	United States
City	Honolulu
Period	16/06/10 → 18/06/10

Keywords

IR-75851
EWI-19101
METIS-276231

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10.1109/VLSIC.2010.5560309

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title = "Quadrature Sampling Mixer Topology for SAW-Less GPS Receivers in 0.18μm CMOS",

abstract = "This paper describes a new switching topology of a sampling mixer for SAW-less GPS (L1 band) receivers. The GPS receiver with the new mixer achieved NF 2.5dB and good blocking performance. In an alternative implementation, the mixer is stacked under a Quadrature VCO to reuse supply current. As a result, the current consumption of the GPS receiver is 11mA from 1.8V supply while maintaining blocking performance and NF of 3.5dB. Test chips are fabricated in 0.18μm CMOS process.",

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T1 - Quadrature Sampling Mixer Topology for SAW-Less GPS Receivers in 0.18μm CMOS

AU - Ikeuchi, Osamu

AU - Saito, Nobuo

AU - Nauta, Bram

PY - 2010/6/17

Y1 - 2010/6/17

N2 - This paper describes a new switching topology of a sampling mixer for SAW-less GPS (L1 band) receivers. The GPS receiver with the new mixer achieved NF 2.5dB and good blocking performance. In an alternative implementation, the mixer is stacked under a Quadrature VCO to reuse supply current. As a result, the current consumption of the GPS receiver is 11mA from 1.8V supply while maintaining blocking performance and NF of 3.5dB. Test chips are fabricated in 0.18μm CMOS process.

AB - This paper describes a new switching topology of a sampling mixer for SAW-less GPS (L1 band) receivers. The GPS receiver with the new mixer achieved NF 2.5dB and good blocking performance. In an alternative implementation, the mixer is stacked under a Quadrature VCO to reuse supply current. As a result, the current consumption of the GPS receiver is 11mA from 1.8V supply while maintaining blocking performance and NF of 3.5dB. Test chips are fabricated in 0.18μm CMOS process.

KW - IR-75851

KW - EWI-19101

KW - METIS-276231

U2 - 10.1109/VLSIC.2010.5560309

DO - 10.1109/VLSIC.2010.5560309

M3 - Conference contribution

SN - 978-1-4244-5454-9

SP - 177

EP - 178

BT - IEEE Symposium on VLSI Circuits, VLSIC 2010

PB - IEEE

CY - Piscataway

T2 - 2010 IEEE Symposium on VLSI Circuits, VLSIC 2010

Y2 - 16 June 2010 through 18 June 2010

ER -

Quadrature Sampling Mixer Topology for SAW-Less GPS Receivers in 0.18μm CMOS

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Keywords

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