Reducing Analogue Fault-Simulation Time by Using High-Level Modelling in Dotss for an Industrial Design

L. Fang, Guido Gronthoud, Hans G. Kerkhoff

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    9 Citations (Scopus)
    Original languageUndefined
    Title of host publicationIEEE Computer Society Proceedings of the ETW
    Place of PublicationStockholm, Sweden
    Pages61-67
    Number of pages7
    Publication statusPublished - 29 May 2001

    Keywords

    • METIS-201872

    Cite this

    Fang, L., Gronthoud, G., & Kerkhoff, H. G. (2001). Reducing Analogue Fault-Simulation Time by Using High-Level Modelling in Dotss for an Industrial Design. In IEEE Computer Society Proceedings of the ETW (pp. 61-67). Stockholm, Sweden.