Reducing Analogue Fault-Simulation Time by Using High-Level Modelling in Dotss for an Industrial Design

  • L. Fang
  • , Guido Gronthoud
  • , Hans G. Kerkhoff

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    Original languageUndefined
    Title of host publicationIEEE Computer Society Proceedings of the ETW
    Place of PublicationStockholm, Sweden
    Pages61-67
    Number of pages7
    Publication statusPublished - 29 May 2001
    Event6th European Test Workshop, ETW 2001 - Stockholm, Sweden
    Duration: 29 May 20011 Jun 2001
    Conference number: 6

    Conference

    Conference6th European Test Workshop, ETW 2001
    Abbreviated titleETW 2001
    Country/TerritorySweden
    CityStockholm
    Period29/05/011/06/01

    Keywords

    • METIS-201872

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