Reducing Quantization Noise With Recursive Sigma-Delta Modulators

Daniel Schinkel, Adrianus Johannes Maria van Tuijl, Anne J. Annema

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    Abstract

    This paper introduces a recursive multibit ΣΔ architecture that enables a high effective quantizer resolution while needing only a limited number of DAC elements. The recursive architecture consists of a set of ΣΔ modulators, whereby each stage cancels the quantization noise of the preceding stage. Conventional DEM algorithms can be used in each stage to reduce the sensitivity to mismatch. The architecture enables a significant reduction of both the signal-band and out-of-band quantization noise power, compared to conventional multibit ΣΔ converters.
    Original languageEnglish
    Title of host publication2004 IEEE International Symposium on Circuits and Systems ISCAS 2004
    Place of PublicationVancouver, Canada
    PublisherIEEE
    Pages1084-1087
    Number of pages4
    ISBN (Print)0-7803-8252-8
    DOIs
    Publication statusPublished - 2004
    EventIEEE International Symposium on Circuits and Systems, ISCAS 2004 - Vancouver, Canada
    Duration: 23 May 200426 May 2004

    Publication series

    Name
    PublisherIEEE

    Conference

    ConferenceIEEE International Symposium on Circuits and Systems, ISCAS 2004
    Abbreviated titleISCAS
    CountryCanada
    CityVancouver
    Period23/05/0426/05/04

    Keywords

    • IR-47891
    • METIS-218881

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