Reliability evaluation of repairable/reconfigurable FPGAs

S. Pontarelli; M. Ottavi; V. Vankamamidi; A. Salsano; F. Lombardi

doi:10.1109/DFT.2006.55

Reliability evaluation of repairable/reconfigurable FPGAs

S. Pontarelli, M. Ottavi, V. Vankamamidi, A. Salsano, F. Lombardi

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

11 Citations (Scopus)

Abstract

Many techniques have been proposed in the technical literature for repairing FPGAs when affected by permanent faults. Almost all of these works exploit the dynamic reconfiguration capabilities of an FPGA; a subset of the available resources is used as spares for replacing the faulty ones. Initially in this paper, a survey of these techniques is presented; subsequently, a framework is proposed for these techniques by which a fair comparison among them can be assessed and evaluated with respect to reliability. A reliability evaluation is provided for different repair strategies under the assumption that the area overhead is constant. Moreover, considerations about time to repair and feasibility of these techniques are provided. The ultimate goal of the paper is therefore to present the state-of-the-art repair techniques as applicable to FPGA and to establish their performance for reliability

Original language	English
Title of host publication	Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
DOIs	https://doi.org/10.1109/DFT.2006.55
Publication status	Published - 2006
Externally published	Yes
Event	21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2006 - Arlington, United States Duration: 4 Oct 2006 → 6 Oct 2006 Conference number: 21

Conference

Conference	21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2006
Abbreviated title	DFT 2006
Country/Territory	United States
City	Arlington
Period	4/10/06 → 6/10/06

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10.1109/DFT.2006.55

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title = "Reliability evaluation of repairable/reconfigurable FPGAs",

abstract = "Many techniques have been proposed in the technical literature for repairing FPGAs when affected by permanent faults. Almost all of these works exploit the dynamic reconfiguration capabilities of an FPGA; a subset of the available resources is used as spares for replacing the faulty ones. Initially in this paper, a survey of these techniques is presented; subsequently, a framework is proposed for these techniques by which a fair comparison among them can be assessed and evaluated with respect to reliability. A reliability evaluation is provided for different repair strategies under the assumption that the area overhead is constant. Moreover, considerations about time to repair and feasibility of these techniques are provided. The ultimate goal of the paper is therefore to present the state-of-the-art repair techniques as applicable to FPGA and to establish their performance for reliability",

author = "S. Pontarelli and M. Ottavi and V. Vankamamidi and A. Salsano and F. Lombardi",

year = "2006",

doi = "10.1109/DFT.2006.55",

language = "English",

booktitle = "Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems",

note = "21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2006, DFT 2006 ; Conference date: 04-10-2006 Through 06-10-2006",

}

Pontarelli, S, Ottavi, M, Vankamamidi, V, Salsano, A & Lombardi, F 2006, Reliability evaluation of repairable/reconfigurable FPGAs. in Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2006, Arlington, Virginia, United States, 4/10/06. https://doi.org/10.1109/DFT.2006.55

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T1 - Reliability evaluation of repairable/reconfigurable FPGAs

AU - Pontarelli, S.

AU - Ottavi, M.

AU - Vankamamidi, V.

AU - Salsano, A.

AU - Lombardi, F.

N1 - Conference code: 21

PY - 2006

Y1 - 2006

N2 - Many techniques have been proposed in the technical literature for repairing FPGAs when affected by permanent faults. Almost all of these works exploit the dynamic reconfiguration capabilities of an FPGA; a subset of the available resources is used as spares for replacing the faulty ones. Initially in this paper, a survey of these techniques is presented; subsequently, a framework is proposed for these techniques by which a fair comparison among them can be assessed and evaluated with respect to reliability. A reliability evaluation is provided for different repair strategies under the assumption that the area overhead is constant. Moreover, considerations about time to repair and feasibility of these techniques are provided. The ultimate goal of the paper is therefore to present the state-of-the-art repair techniques as applicable to FPGA and to establish their performance for reliability

AB - Many techniques have been proposed in the technical literature for repairing FPGAs when affected by permanent faults. Almost all of these works exploit the dynamic reconfiguration capabilities of an FPGA; a subset of the available resources is used as spares for replacing the faulty ones. Initially in this paper, a survey of these techniques is presented; subsequently, a framework is proposed for these techniques by which a fair comparison among them can be assessed and evaluated with respect to reliability. A reliability evaluation is provided for different repair strategies under the assumption that the area overhead is constant. Moreover, considerations about time to repair and feasibility of these techniques are provided. The ultimate goal of the paper is therefore to present the state-of-the-art repair techniques as applicable to FPGA and to establish their performance for reliability

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M3 - Conference contribution

BT - Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

T2 - 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2006

Y2 - 4 October 2006 through 6 October 2006

ER -

Reliability evaluation of repairable/reconfigurable FPGAs

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