Abstract
Successive-approximation-register (SAR) analog-to-digital converters (ADCs) represent the majority of the ADC market from medium to high resolution ADCs. Due to its low power, high-performance and small area in Mega-Hz range, SAR ADCs are increasingly attractive for todays safe-critical applications like automotive. Recently, much research has been carried out on self-calibrations of SAR ADCs, which are mostly focussed on passive capacitor banks inside SAR ADCs. However the reliability of SAR ADCs is rarely reported, which is more related to the active circuit parts and is also essential for safe-critical applications. In this paper, the focus will be on the reliability effects and associated embedded instrument detection of a 10-bits SAR ADC in 65nm CMOS technology. The NBTI degradation in the bootstrapped switches, self-timing asynchronous SAR logics, input buffer and comparator inside a 10-bits SAR ADC are investigated as well as the overall performance degradation of the ADC. Finally, embedded instrument methods are proposed to detect these reliability influences in SAR ADCs.
Original language | Undefined |
---|---|
Title of host publication | 20th International Mixed-Signal Testing Workshop, IMSTW 2015 |
Place of Publication | France |
Publisher | IEEE |
Pages | 1-5 |
Number of pages | 5 |
ISBN (Print) | 978-1-4673-6732-5 |
DOIs | |
Publication status | Published - 24 Jun 2015 |
Event | 2015 IEEE 20th International Mixed-Signals Testing Workshop, IMSTW 2015 - Paris, France Duration: 24 Jun 2015 → 26 Jun 2015 Conference number: 20 |
Publication series
Name | |
---|---|
Publisher | IEEE Computer Society |
Workshop
Workshop | 2015 IEEE 20th International Mixed-Signals Testing Workshop, IMSTW 2015 |
---|---|
Abbreviated title | IMSTW |
Country/Territory | France |
City | Paris |
Period | 24/06/15 → 26/06/15 |
Keywords
- EWI-26293
- METIS-312715
- IR-97825
- CAES-TDT: Testable Design and Test