Repetitive Quiescence in Implementation and Testing (Extended Abstract)

G.J. Tretmans

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    This paper studies implementation relations and testing based on labelled transition sys- tems, using the assumption that implementations communicate with their environment via inputs and outputs. Such implementations are formalized by restricting the class of transition systems to those systems that can always accept input actions. Implementation relations, which formalize the notion of correctness of these implementations with respect to labelled transition system specifications, are defined analogous to the theories of testing equivalence and preorder, and refusal testing. A test generation algorithm is given, which is proved to produce a sound and exhaustive test suite from a specification, i.e., a test suite that fully characterizes the set of correct implementations.
    Original languageEnglish
    Title of host publicationPartial-Order Reduzierung des Zustandsraumes bei der BDD-Modellprüfung
    Subtitle of host publicationGI/ITG-Fachgespräch, 19. - 20. Juni 1997 in Berlin
    EditorsA. Wolisz, I. Schieferdecker, A. Rennoch
    Place of PublicationSankt Augustin
    PublisherGMD-Forschungszentrum Informationstechnik GmbH
    Number of pages15
    ISBN (Print)3-88457-315-2
    Publication statusPublished - Jun 1997
    EventFormale Beschreibungstechniken für verteilte Systeme, FBT 1997: GI/ITG-Fachgespräch - Berlin, Germany
    Duration: 19 Jun 199720 Jun 1997

    Publication series

    NameGMD Studien
    PublisherGMD-Forschungszentrum Informationstechnik GmbH


    WorkshopFormale Beschreibungstechniken für verteilte Systeme, FBT 1997
    Abbreviated titleFBT




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