Abstract
SiC devices are promising for outperforming Si counterparts in high-frequency applications due to its superior material properties. Conventional wirebonded packaging scheme has been one of the most preferred package structures for power modules. However, the technique limits the performance of a SiC power module due to parasitic inductance and heat dissipation issues that are inherent with aluminum wires. In this article, low parasitic inductance and high-efficient cooling interconnection techniques for Si power modules, which are the foundation of packaging methods of SiC ones, are reviewed first. Then, attempts on developing packaging techniques for SiC power modules are thoroughly overviewed. Finally, scientific challenges in the packaging of SiC power module are summarized.
| Original language | English |
|---|---|
| Article number | 19351787 |
| Pages (from-to) | 223-238 |
| Number of pages | 16 |
| Journal | IEEE Journal of Emerging and Selected Topics in Power Electronics |
| Volume | 8 |
| Issue number | 1 |
| Early online date | 15 Oct 2019 |
| DOIs | |
| Publication status | Published - 1 Mar 2020 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 7 Affordable and Clean Energy
Keywords
- High-efficient cooling
- Low parasitic inductance
- Packaging schemes
- Scientific challenges
- SiC power module
- 22/2 OA procedure
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