RF Circuit linearity optimization using a general weak nonlinearity model

W. Cheng, M.S. Oude Alink, Anne J. Annema, Jeroen A. Croon, Bram Nauta

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    Abstract

    This paper focuses on optimizing the linearity in known RF circuits, by exploring the circuit design space that is usually available in today’s deep submicron CMOS technologies. Instead of using brute force numerical optimizers we apply a generalized weak nonlinearity model that only involves AC transfer functions to derive simple equations for obtaining design insights. The generalized weak nonlinearity model is applied to three known RF circuits: a cascode common source amplifier, a common gate LNA and a CMOS attenuator. It is shown that in deep submicron CMOS technologies the cascode transistor in both the common source amplifier and in the common gate amplifier significantly contributes IM3 distortion. Some design insights are presented for reducing the cascode transistor related distortion, among which moderate inversion biasing that improves IIP3 by 10 dB up to 5 GHz in a 90 nm CMOS process. For the attenuator, a wideband IM3 cancellation technique is introduced and demonstrated using simulations.
    Original languageEnglish
    Pages (from-to)2340-2353
    Number of pages14
    JournalIEEE transactions on circuits and systems I: regular papers
    Volume59
    Issue number10
    DOIs
    Publication statusPublished - 1 Oct 2012

    Keywords

    • EWI-22456
    • IR-83398
    • METIS-296134

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