TY - JOUR
T1 - RF transconductor linearization robust to process, voltage and temperature variations
AU - Kundur Subramaniyan, H.
AU - Klumperink, Eric A.M.
AU - Srinivasan, Venkatesh
AU - Kiaei, Ali
AU - Nauta, Bram
N1 - eemcs-eprint-26460
PY - 2015/11/1
Y1 - 2015/11/1
N2 - Software-defined radio receivers increasingly exploit linear RF V-I conversion, instead of RF voltage gain, to improve interference robustness. Unfortunately, the linearity of CMOS inverters, which are often used to implement V-I conversion, is highly sensitive to Process, Voltage and Temperature variations. This paper proposes a more robust technique based on resistive degeneration. To mitigate third-order IM3 distortion induced by the quadratic MOSFET I-V characteristic, a new linearization technique is proposed which exploits a floating battery by-pass circuit and replica biasing to improve IIP3 in a robust way. This paper explains the concept and analyzes linearity improvement. To demonstrate operation, an LNTA with current domain mixer is implemented in a 45 nm CMOS process. Compared to a conventional inverter based LNTA with the same transconductance, it improves IIP3 from 2 dBm to a robust PIIP3 of 8 dBm at the cost of 67% increase in power consumption.
AB - Software-defined radio receivers increasingly exploit linear RF V-I conversion, instead of RF voltage gain, to improve interference robustness. Unfortunately, the linearity of CMOS inverters, which are often used to implement V-I conversion, is highly sensitive to Process, Voltage and Temperature variations. This paper proposes a more robust technique based on resistive degeneration. To mitigate third-order IM3 distortion induced by the quadratic MOSFET I-V characteristic, a new linearization technique is proposed which exploits a floating battery by-pass circuit and replica biasing to improve IIP3 in a robust way. This paper explains the concept and analyzes linearity improvement. To demonstrate operation, an LNTA with current domain mixer is implemented in a 45 nm CMOS process. Compared to a conventional inverter based LNTA with the same transconductance, it improves IIP3 from 2 dBm to a robust PIIP3 of 8 dBm at the cost of 67% increase in power consumption.
U2 - 10.1109/JSSC.2015.2453964
DO - 10.1109/JSSC.2015.2453964
M3 - Article
SN - 0018-9200
VL - 50
SP - 2591
EP - 2602
JO - IEEE journal of solid-state circuits
JF - IEEE journal of solid-state circuits
IS - 11
ER -