RTP Annealings for High-Quality LPCVD Interpolysilicon Dielectric Layers

J.H. Klootwijk, H. van Kranenburg, Marcel H.H. Weusthof, P.H. Woerlee, Hans Wallinga

Research output: Contribution to journalArticleAcademicpeer-review

2 Citations (Scopus)

Abstract

Deposited instead of thermally grown oxides were studied to form high-quality interpolysilicon dielectric layers for embedded non-volatile memory application. It was found that by optimizing the texture and morphology of the polysilicon layers and by optimizing the post-dielectric deposition-anneal, very high-quality dielectric layers can be obtained. In this paper it is shown that for deposited interpolysilicon oxides rapid thermal annealing leads to improved electrical characteristics, like high charge to breakdown (Qbd≈20 C/cm2), lower leakage currents and decreased charge trapping during stress, depending on the RTP anneal ambient. Three annealing ambients are compared: N2, O2 and N2O. Annealing in N2O ambient is shown to be superior to the other annealings.
Original languageUndefined
Pages (from-to)277-280
Number of pages4
JournalMicroelectronics reliability
Volume38
Issue number38
DOIs
Publication statusPublished - 1998

Keywords

  • METIS-112003
  • IR-73895

Cite this

Klootwijk, J.H. ; van Kranenburg, H. ; Weusthof, Marcel H.H. ; Woerlee, P.H. ; Wallinga, Hans. / RTP Annealings for High-Quality LPCVD Interpolysilicon Dielectric Layers. In: Microelectronics reliability. 1998 ; Vol. 38, No. 38. pp. 277-280.
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abstract = "Deposited instead of thermally grown oxides were studied to form high-quality interpolysilicon dielectric layers for embedded non-volatile memory application. It was found that by optimizing the texture and morphology of the polysilicon layers and by optimizing the post-dielectric deposition-anneal, very high-quality dielectric layers can be obtained. In this paper it is shown that for deposited interpolysilicon oxides rapid thermal annealing leads to improved electrical characteristics, like high charge to breakdown (Qbd≈20 C/cm2), lower leakage currents and decreased charge trapping during stress, depending on the RTP anneal ambient. Three annealing ambients are compared: N2, O2 and N2O. Annealing in N2O ambient is shown to be superior to the other annealings.",
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RTP Annealings for High-Quality LPCVD Interpolysilicon Dielectric Layers. / Klootwijk, J.H.; van Kranenburg, H.; Weusthof, Marcel H.H.; Woerlee, P.H.; Wallinga, Hans.

In: Microelectronics reliability, Vol. 38, No. 38, 1998, p. 277-280.

Research output: Contribution to journalArticleAcademicpeer-review

TY - JOUR

T1 - RTP Annealings for High-Quality LPCVD Interpolysilicon Dielectric Layers

AU - Klootwijk, J.H.

AU - van Kranenburg, H.

AU - Weusthof, Marcel H.H.

AU - Woerlee, P.H.

AU - Wallinga, Hans

PY - 1998

Y1 - 1998

N2 - Deposited instead of thermally grown oxides were studied to form high-quality interpolysilicon dielectric layers for embedded non-volatile memory application. It was found that by optimizing the texture and morphology of the polysilicon layers and by optimizing the post-dielectric deposition-anneal, very high-quality dielectric layers can be obtained. In this paper it is shown that for deposited interpolysilicon oxides rapid thermal annealing leads to improved electrical characteristics, like high charge to breakdown (Qbd≈20 C/cm2), lower leakage currents and decreased charge trapping during stress, depending on the RTP anneal ambient. Three annealing ambients are compared: N2, O2 and N2O. Annealing in N2O ambient is shown to be superior to the other annealings.

AB - Deposited instead of thermally grown oxides were studied to form high-quality interpolysilicon dielectric layers for embedded non-volatile memory application. It was found that by optimizing the texture and morphology of the polysilicon layers and by optimizing the post-dielectric deposition-anneal, very high-quality dielectric layers can be obtained. In this paper it is shown that for deposited interpolysilicon oxides rapid thermal annealing leads to improved electrical characteristics, like high charge to breakdown (Qbd≈20 C/cm2), lower leakage currents and decreased charge trapping during stress, depending on the RTP anneal ambient. Three annealing ambients are compared: N2, O2 and N2O. Annealing in N2O ambient is shown to be superior to the other annealings.

KW - METIS-112003

KW - IR-73895

U2 - 10.1016/S0026-2714(97)00047-4

DO - 10.1016/S0026-2714(97)00047-4

M3 - Article

VL - 38

SP - 277

EP - 280

JO - Microelectronics reliability

JF - Microelectronics reliability

SN - 0026-2714

IS - 38

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