Abstract
This paper describes the implementation and evaluation of an algorithm that maps a number of communicating processes to a heterogeneous tiled System on Chip (SoC) architecture at run-time. The mapping algorithm minimizes the total amount of energy consumption, while still providing an adequate Quality of Service (QoS). The properties of the algorithmare described and evaluated and a realistic mapping example is given.
Original language | Undefined |
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Title of host publication | 5th PROGRESS Symposium on Embedded Systems |
Place of Publication | Nieuwegein, the Netherlands |
Publisher | STW |
Pages | 185-192 |
Number of pages | 8 |
ISBN (Print) | 90-73461-41-3 |
Publication status | Published - Oct 2004 |
Event | 5th PROGRESS Symposium on Embedded Systems 2004 - Nieuwegein, Netherlands Duration: 20 Oct 2004 → 20 Oct 2004 Conference number: 5 |
Publication series
Name | |
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Publisher | STW Technology Foundation |
Conference
Conference | 5th PROGRESS Symposium on Embedded Systems 2004 |
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Abbreviated title | PROGRESS |
Country/Territory | Netherlands |
City | Nieuwegein |
Period | 20/10/04 → 20/10/04 |
Keywords
- METIS-221812
- CAES-EEA: Efficient Embedded Architectures
- EWI-1492
- IR-49442