Run-time mapping of applications to a heterogeneous reconfigurable tiled system on chip architecture

Lodewijk T. Smit, Gerard J.M. Smit, Johann L. Hurink, Hajo Broersma, Daniël Paulusma, Pascal T. Wolkotte

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

28 Citations (Scopus)
10 Downloads (Pure)

Abstract

This paper evaluates an algorithm that maps a number of communicating processes to a heterogeneous tiled System on Chip (SoC) architecture at run-time. The mapping algorithm minimizes the total amount of energy consumption, while still providing an adequate Quality of Service (QoS). A realistic example is mapped using this algorithm.
Original languageEnglish
Title of host publication2004 IEEE International Conference on Field-Programmable Technology, 2004
Subtitle of host publicationProceedings
Place of PublicationPiscataway, NJ
PublisherIEEE
Pages421-424
Number of pages4
ISBN (Print)0-7803-8651-5
DOIs
Publication statusPublished - Dec 2004
Event2004 IEEE International Conference on Field-Programmable Technology, FPT 2004 - Brisbane, Australia
Duration: 6 Dec 20048 Dec 2004

Conference

Conference2004 IEEE International Conference on Field-Programmable Technology, FPT 2004
Abbreviated titleFPT
CountryAustralia
CityBrisbane
Period6/12/048/12/04

Fingerprint

Quality of service
Energy utilization
System-on-chip

Keywords

  • CAES-EEA: Efficient Embedded Architectures
  • EWI-1485
  • IR-48501
  • EC Grant Agreement nr.: FP6/001908
  • METIS-220029

Cite this

Smit, L. T., Smit, G. J. M., Hurink, J. L., Broersma, H., Paulusma, D., & Wolkotte, P. T. (2004). Run-time mapping of applications to a heterogeneous reconfigurable tiled system on chip architecture. In 2004 IEEE International Conference on Field-Programmable Technology, 2004: Proceedings (pp. 421-424). Piscataway, NJ: IEEE. https://doi.org/10.1109/FPT.2004.1393315
Smit, Lodewijk T. ; Smit, Gerard J.M. ; Hurink, Johann L. ; Broersma, Hajo ; Paulusma, Daniël ; Wolkotte, Pascal T. / Run-time mapping of applications to a heterogeneous reconfigurable tiled system on chip architecture. 2004 IEEE International Conference on Field-Programmable Technology, 2004: Proceedings. Piscataway, NJ : IEEE, 2004. pp. 421-424
@inproceedings{11f1ad273e514f76844ab4e7f2985d0d,
title = "Run-time mapping of applications to a heterogeneous reconfigurable tiled system on chip architecture",
abstract = "This paper evaluates an algorithm that maps a number of communicating processes to a heterogeneous tiled System on Chip (SoC) architecture at run-time. The mapping algorithm minimizes the total amount of energy consumption, while still providing an adequate Quality of Service (QoS). A realistic example is mapped using this algorithm.",
keywords = "CAES-EEA: Efficient Embedded Architectures, EWI-1485, IR-48501, EC Grant Agreement nr.: FP6/001908, METIS-220029",
author = "Smit, {Lodewijk T.} and Smit, {Gerard J.M.} and Hurink, {Johann L.} and Hajo Broersma and Dani{\"e}l Paulusma and Wolkotte, {Pascal T.}",
note = "Imported from CHAMELEON.xml",
year = "2004",
month = "12",
doi = "10.1109/FPT.2004.1393315",
language = "English",
isbn = "0-7803-8651-5",
pages = "421--424",
booktitle = "2004 IEEE International Conference on Field-Programmable Technology, 2004",
publisher = "IEEE",
address = "United States",

}

Smit, LT, Smit, GJM, Hurink, JL, Broersma, H, Paulusma, D & Wolkotte, PT 2004, Run-time mapping of applications to a heterogeneous reconfigurable tiled system on chip architecture. in 2004 IEEE International Conference on Field-Programmable Technology, 2004: Proceedings. IEEE, Piscataway, NJ, pp. 421-424, 2004 IEEE International Conference on Field-Programmable Technology, FPT 2004, Brisbane, Australia, 6/12/04. https://doi.org/10.1109/FPT.2004.1393315

Run-time mapping of applications to a heterogeneous reconfigurable tiled system on chip architecture. / Smit, Lodewijk T.; Smit, Gerard J.M.; Hurink, Johann L.; Broersma, Hajo; Paulusma, Daniël; Wolkotte, Pascal T.

2004 IEEE International Conference on Field-Programmable Technology, 2004: Proceedings. Piscataway, NJ : IEEE, 2004. p. 421-424.

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

TY - GEN

T1 - Run-time mapping of applications to a heterogeneous reconfigurable tiled system on chip architecture

AU - Smit, Lodewijk T.

AU - Smit, Gerard J.M.

AU - Hurink, Johann L.

AU - Broersma, Hajo

AU - Paulusma, Daniël

AU - Wolkotte, Pascal T.

N1 - Imported from CHAMELEON.xml

PY - 2004/12

Y1 - 2004/12

N2 - This paper evaluates an algorithm that maps a number of communicating processes to a heterogeneous tiled System on Chip (SoC) architecture at run-time. The mapping algorithm minimizes the total amount of energy consumption, while still providing an adequate Quality of Service (QoS). A realistic example is mapped using this algorithm.

AB - This paper evaluates an algorithm that maps a number of communicating processes to a heterogeneous tiled System on Chip (SoC) architecture at run-time. The mapping algorithm minimizes the total amount of energy consumption, while still providing an adequate Quality of Service (QoS). A realistic example is mapped using this algorithm.

KW - CAES-EEA: Efficient Embedded Architectures

KW - EWI-1485

KW - IR-48501

KW - EC Grant Agreement nr.: FP6/001908

KW - METIS-220029

U2 - 10.1109/FPT.2004.1393315

DO - 10.1109/FPT.2004.1393315

M3 - Conference contribution

SN - 0-7803-8651-5

SP - 421

EP - 424

BT - 2004 IEEE International Conference on Field-Programmable Technology, 2004

PB - IEEE

CY - Piscataway, NJ

ER -

Smit LT, Smit GJM, Hurink JL, Broersma H, Paulusma D, Wolkotte PT. Run-time mapping of applications to a heterogeneous reconfigurable tiled system on chip architecture. In 2004 IEEE International Conference on Field-Programmable Technology, 2004: Proceedings. Piscataway, NJ: IEEE. 2004. p. 421-424 https://doi.org/10.1109/FPT.2004.1393315