Semantic programming model-based design

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    For a generic flexible efficient array antenna receiver platform a hierarchical tiled architecture has been proposed, giving a heterogeneous multi-processor system-on-chip (MPSoC), multiple chips on a board (MCoB) and multiple boards in a system (MBiS). A wide range of MPSoCs are predicted to be used in the near future but how to efficiently apply these designs remains an issue. We will advocate a model-based design approach and propose a single semantic (programming) model for representing the specification, design and implementation and allowing for verification, simulation, architecture definition and design space exploration. A single model for specification, (formal or functional) verification, simulation and programming an MPSoC has obvious as well as some less obvious advantages. It allows for model-based design down to the implementation, especially for hierarchical MPSoC architectures. Partitioning and mapping of the functionality to an architecture is commonly done manually. Using the proposed approach the feasibility of (partly) automated design space exploration is discussed for determining either a partitioning and mapping for a given architecture or an optimal architecture based on set constraints. The proposed hierarchical tiled architecture provides a flexible reconfigurable solution, however partitioning, mapping, modeling and programming such systems remains an issue. The proposed approach tackles these problems at a higher conceptual level, thereby exploiting the inherent composability and parallelism available in the formalism. Design space explorations is facilitated by allowing transformations between different partitionings and mappings. However, the generic applicability and limitations of this approach will need to be researched further.
    Original languageUndefined
    Title of host publicationProceedings of the 19th Annual Workshop on Circuits Systems and Signal Processing (ProRISC)
    Place of PublicationUtrecht
    Number of pages6
    ISBN (Print)978-90-73461-56-7
    Publication statusPublished - 27 Nov 2008
    Event19th Annual Workshop on Circuits, Systems and Signal Processing, ProRISC 2008 - Veldhoven, Netherlands
    Duration: 27 Nov 200828 Nov 2008
    Conference number: 19

    Publication series

    PublisherSTW Technology Foundation


    Conference19th Annual Workshop on Circuits, Systems and Signal Processing, ProRISC 2008


    • Phased array
    • EWI-15004
    • hierarchical tiled architecture
    • semantic programming model
    • METIS-255476
    • Beam-forming
    • MP-SoC
    • Model-based design
    • IR-65363

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