Sidewall patterning - A new wafer-scale method for accurate patterning of vertical silicon structures

P. J. Westerik, W. J.C. Vijselaar, J. W. Berenschot, N. R. Tas (Corresponding Author), J. Huskens, J. G.E. Gardeniers

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7 Citations (Scopus)
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For the definition of wafer scale micro- and nanostructures, in-plane geometry is usually controlled by optical lithography. However, options for precisely patterning structures in the out-of-plane direction are much more limited. In this paper we present a versatile self-aligned technique that allows for reproducible sub-micrometer resolution local modification along vertical silicon sidewalls. Instead of optical lithography, this method makes smart use of inclined ion beam etching to selectively etch the top parts of structures, and controlled retraction of a conformal layer to define a hard mask in the vertical direction. The top, bottom or middle part of a structure could be selectively exposed, and it was shown that these exposed regions can, for example, be selectively covered with a catalyst, doped, or structured further.

Original languageEnglish
Article number015008
JournalJournal of micromechanics and microengineering
Issue number1
Early online date12 Dec 2017
Publication statusPublished - 1 Jan 2018


  • Corner lithography
  • Microfabrication
  • Nanofabrication
  • Nanotechnology
  • Retraction edge lithography
  • Wafer scale


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