Slew Rate Induced Distortion in Switched-Resistor Integrators

A. Jiraseree-Amornkun; A. Jiraseree-amornkun; A. Worapishet; Eric A.M. Klumperink; Bram Nauta; W. Surakampontorn

doi:10.1109/ISCAS.2006.1693127

Slew Rate Induced Distortion in Switched-Resistor Integrators

A. Jiraseree-Amornkun, A. Jiraseree-amornkun, A. Worapishet, Eric A.M. Klumperink, Bram Nauta, W. Surakampontorn

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

2 Citations (Scopus)

199 Downloads (Pure)

Abstract

Abstract—OPAMP-RC integrators built with linear resistors and capacitors can achieve very high linearity. By means of a switched resistor, tuning of the RC time-constant is possible via the duty-cycle of the clock controlling the switched resistor. This paper analyzes the effect of OPAMP slew rate limitations on the distortion of a switched-resistor lossy OPAMP-RC integrator. We show via analysis and simulations that the use of two sets of switched resistors instead of one relaxes the OPAMP slew rate requirements, and reduces the resulting distortion significantly.

Original language	English
Title of host publication	2006 IEEE International Symposium on Circuits and Systems, ISCAS
Place of Publication	Piscataway
Publisher	IEEE
Pages	2485-2488
Number of pages	4
ISBN (Print)	0-7803-9390-2
DOIs	https://doi.org/10.1109/ISCAS.2006.1693127
Publication status	Published - 23 May 2006
Event	IEEE International Symposium on Circuits and Systems, ISCAS 2006 - Island of Kos, Greece Duration: 21 May 2006 → 24 May 2006

Publication series

Name
Publisher	IEEE
Number	2

Conference

Conference	IEEE International Symposium on Circuits and Systems, ISCAS 2006
Abbreviated title	ISCAS 2006
Country/Territory	Greece
City	Island of Kos
Period	21/05/06 → 24/05/06

Keywords

EWI-6131
IR-58141
METIS-238086

Access to Document

10.1109/ISCAS.2006.1693127

slew_rateFinal published version, 1.58 MB

Cite this

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title = "Slew Rate Induced Distortion in Switched-Resistor Integrators",

abstract = "Abstract—OPAMP-RC integrators built with linear resistors and capacitors can achieve very high linearity. By means of a switched resistor, tuning of the RC time-constant is possible via the duty-cycle of the clock controlling the switched resistor. This paper analyzes the effect of OPAMP slew rate limitations on the distortion of a switched-resistor lossy OPAMP-RC integrator. We show via analysis and simulations that the use of two sets of switched resistors instead of one relaxes the OPAMP slew rate requirements, and reduces the resulting distortion significantly.",

keywords = "EWI-6131, IR-58141, METIS-238086",

author = "A. Jiraseree-Amornkun and A. Jiraseree-amornkun and A. Worapishet and Klumperink, {Eric A.M.} and Bram Nauta and W. Surakampontorn",

year = "2006",

month = may,

day = "23",

doi = "10.1109/ISCAS.2006.1693127",

language = "English",

isbn = "0-7803-9390-2",

publisher = "IEEE",

number = "2",

pages = "2485--2488",

booktitle = "2006 IEEE International Symposium on Circuits and Systems, ISCAS",

address = "United States",

note = "IEEE International Symposium on Circuits and Systems, ISCAS 2006, ISCAS 2006 ; Conference date: 21-05-2006 Through 24-05-2006",

}

Jiraseree-Amornkun, A, Jiraseree-amornkun, A, Worapishet, A, Klumperink, EAM , Nauta, B & Surakampontorn, W 2006, Slew Rate Induced Distortion in Switched-Resistor Integrators. in 2006 IEEE International Symposium on Circuits and Systems, ISCAS. IEEE, Piscataway, pp. 2485-2488, IEEE International Symposium on Circuits and Systems, ISCAS 2006, Island of Kos, Greece, 21/05/06. https://doi.org/10.1109/ISCAS.2006.1693127

TY - GEN

T1 - Slew Rate Induced Distortion in Switched-Resistor Integrators

AU - Jiraseree-Amornkun, A.

AU - Jiraseree-amornkun, A.

AU - Worapishet, A.

AU - Klumperink, Eric A.M.

AU - Nauta, Bram

AU - Surakampontorn, W.

PY - 2006/5/23

Y1 - 2006/5/23

N2 - Abstract—OPAMP-RC integrators built with linear resistors and capacitors can achieve very high linearity. By means of a switched resistor, tuning of the RC time-constant is possible via the duty-cycle of the clock controlling the switched resistor. This paper analyzes the effect of OPAMP slew rate limitations on the distortion of a switched-resistor lossy OPAMP-RC integrator. We show via analysis and simulations that the use of two sets of switched resistors instead of one relaxes the OPAMP slew rate requirements, and reduces the resulting distortion significantly.

AB - Abstract—OPAMP-RC integrators built with linear resistors and capacitors can achieve very high linearity. By means of a switched resistor, tuning of the RC time-constant is possible via the duty-cycle of the clock controlling the switched resistor. This paper analyzes the effect of OPAMP slew rate limitations on the distortion of a switched-resistor lossy OPAMP-RC integrator. We show via analysis and simulations that the use of two sets of switched resistors instead of one relaxes the OPAMP slew rate requirements, and reduces the resulting distortion significantly.

KW - EWI-6131

KW - IR-58141

KW - METIS-238086

U2 - 10.1109/ISCAS.2006.1693127

DO - 10.1109/ISCAS.2006.1693127

M3 - Conference contribution

SN - 0-7803-9390-2

SP - 2485

EP - 2488

BT - 2006 IEEE International Symposium on Circuits and Systems, ISCAS

PB - IEEE

CY - Piscataway

T2 - IEEE International Symposium on Circuits and Systems, ISCAS 2006

Y2 - 21 May 2006 through 24 May 2006

ER -

Slew Rate Induced Distortion in Switched-Resistor Integrators

Abstract

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Keywords

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