Stacked Clock-Generation Circuit

Rahul Todi (Inventor), Mark Stefan Oude Alink (Inventor)

Research output: Patent

12 Downloads (Pure)
Original languageEnglish
Patent numberUS9,679,623B2
Priority date31/08/15
Publication statusPublished - 13 Jun 2017
Externally publishedYes

Cite this

Todi, R., & Oude Alink, M. S. (2017). Stacked Clock-Generation Circuit. (Patent No. US9,679,623B2).
Todi, Rahul (Inventor) ; Oude Alink, Mark Stefan (Inventor). / Stacked Clock-Generation Circuit. Patent No.: US9,679,623B2.
@misc{1b5a77e938774663aca4e15147271ad4,
title = "Stacked Clock-Generation Circuit",
author = "Rahul Todi and {Oude Alink}, {Mark Stefan}",
year = "2017",
month = "6",
day = "13",
language = "English",
type = "Patent",
note = "US9,679,623B2",

}

Todi, R & Oude Alink, MS 2017, Stacked Clock-Generation Circuit, Patent No. US9,679,623B2.

Stacked Clock-Generation Circuit. / Todi, Rahul (Inventor); Oude Alink, Mark Stefan (Inventor).

Patent No.: US9,679,623B2.

Research output: Patent

TY - PAT

T1 - Stacked Clock-Generation Circuit

AU - Todi, Rahul

AU - Oude Alink, Mark Stefan

PY - 2017/6/13

Y1 - 2017/6/13

M3 - Patent

M1 - US9,679,623B2

ER -

Todi R, Oude Alink MS, inventors. Stacked Clock-Generation Circuit. US9,679,623B2. 2017 Jun 13.