Stray-insensitive sample-delay-hold buffers for high-frequency switched-capacitor filters

J.J.F. Rijns, Hans Wallinga

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    4 Citations (Scopus)
    197 Downloads (Pure)

    Abstract

    Two high-frequency switched-capacitor sample-delay-hold (SDH) buffers are presented. The circuits provide a correct transition from the continuous-time to the discrete-time domain or vice versa. Experimental results show an excellent frequency behavior for clock frequencies up to 25 MHz.
    Original languageEnglish
    Title of host publicationProceedings IEEE International Symposium on Circuits and Systems, ISCAS 1991
    Place of PublicationPiscataway, NJ, USA
    PublisherIEEE
    Pages1665-1668
    Number of pages0
    ISBN (Print)9780780300507
    DOIs
    Publication statusPublished - 11 Jun 1991
    EventIEEE International Symposium on Circuits and Systems, ISCAS 1991 - Singapore, Singapore
    Duration: 11 Jun 199114 Jun 1991

    Publication series

    Name
    PublisherIEEE
    Volume3

    Conference

    ConferenceIEEE International Symposium on Circuits and Systems, ISCAS 1991
    Abbreviated titleISCAS
    Country/TerritorySingapore
    CitySingapore
    Period11/06/9114/06/91

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