Abstract
The IEEE 1687 (iJTAG) standard introduces an efficient access network based on reconfigurable scan, for accessing the increasing number of embedded instruments. Pattern retargeting is defined as the process of translating an instrument pattern to several network-level scan vectors. In this paper, an efficient structured methodology is presented for performing dynamic pattern retargeting. Dynamic retargeting is required in case of runtime access of the iJTAG networks, for example in debugging or reliability management. The presented methodology enables faster pattern generation as compared to previous search-based methods which is necessary for runtime access. This methodology could be used in a lightweight iJTAG debugger or in a software-based on-chip iJTAG controller.
Original language | English |
---|---|
Title of host publication | 2017 IEEE 35th VLSI Test Symposium (VTS) |
Publisher | IEEE |
Number of pages | 6 |
ISBN (Electronic) | 978-1-5090-4482-5 |
ISBN (Print) | 978-1-5090-4483-2 |
DOIs | |
Publication status | Published - 9 Apr 2017 |
Event | 35th IEEE VLSI Test Symposium, VTS 2017 - Caesars Palace, Las Vegas, United States Duration: 9 Apr 2017 → 12 Apr 2017 Conference number: 35 http://tttc-vts.org/public_html/new/2017/ |
Conference
Conference | 35th IEEE VLSI Test Symposium, VTS 2017 |
---|---|
Abbreviated title | VTS |
Country/Territory | United States |
City | Las Vegas |
Period | 9/04/17 → 12/04/17 |
Internet address |