Study on the influence of package parasitics and substrate resistance on the Charged Device Model(CDM) failure levels - possible protection methodology

M.S.B. Sowariraj, Theo Smedes, Cora Salm, A.J. Mouthaan, F.G. Kuper

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademic

Abstract

Charged Device Model (CDM) type of Electrostatic Discharge (ESD) stress events are becoming the major reason for field returns in the Integrated Circuit (IC) industry especially with downscaling of device dimensions and increased usage of automated handlers. In the case of CDM stress, the IC is both the source of static charge and part of the discharge path. Hence CDM test results are greatly affected by the package properties and the distribution of the protection devices within the die. In this paper we present a systematic approach to understand the actual influence of these factors in the IC during a CDM event. The CDM test set-up is modeled using PSPICE circuit simulator and the discharge waveforms thus obtained are compared with the experimental observations. This model is then used to compare the actual discharge current flowing through the die and the protection structures for two different package materials. A general protection methodology for the ICs during CDM event, applicable to all IC design types, is suggested.
Original languageUndefined
Title of host publicationProceedings of the 6th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors SAFE 2003
Place of PublicationUtrecht, The Netherlands
PublisherSTW
Pages657-662
Number of pages6
ISBN (Print)90-73461-39-1
Publication statusPublished - 25 Nov 2003
Event6th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors, SAFE 2003 - Veldhoven, Netherlands
Duration: 25 Nov 200326 Nov 2003
Conference number: 6

Publication series

Name
PublisherSTW Technology Foundation

Conference

Conference6th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors, SAFE 2003
Abbreviated titleSAFE
CountryNetherlands
CityVeldhoven
Period25/11/0326/11/03

Keywords

  • IR-67745
  • Actuators
  • METIS-213264
  • Semiconductor
  • Sensors
  • System(s)
  • ProRISC
  • circuit
  • EWI-15568

Cite this

Sowariraj, M. S. B., Smedes, T., Salm, C., Mouthaan, A. J., & Kuper, F. G. (2003). Study on the influence of package parasitics and substrate resistance on the Charged Device Model(CDM) failure levels - possible protection methodology. In Proceedings of the 6th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors SAFE 2003 (pp. 657-662). Utrecht, The Netherlands: STW.
Sowariraj, M.S.B. ; Smedes, Theo ; Salm, Cora ; Mouthaan, A.J. ; Kuper, F.G. / Study on the influence of package parasitics and substrate resistance on the Charged Device Model(CDM) failure levels - possible protection methodology. Proceedings of the 6th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors SAFE 2003. Utrecht, The Netherlands : STW, 2003. pp. 657-662
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title = "Study on the influence of package parasitics and substrate resistance on the Charged Device Model(CDM) failure levels - possible protection methodology",
abstract = "Charged Device Model (CDM) type of Electrostatic Discharge (ESD) stress events are becoming the major reason for field returns in the Integrated Circuit (IC) industry especially with downscaling of device dimensions and increased usage of automated handlers. In the case of CDM stress, the IC is both the source of static charge and part of the discharge path. Hence CDM test results are greatly affected by the package properties and the distribution of the protection devices within the die. In this paper we present a systematic approach to understand the actual influence of these factors in the IC during a CDM event. The CDM test set-up is modeled using PSPICE circuit simulator and the discharge waveforms thus obtained are compared with the experimental observations. This model is then used to compare the actual discharge current flowing through the die and the protection structures for two different package materials. A general protection methodology for the ICs during CDM event, applicable to all IC design types, is suggested.",
keywords = "IR-67745, Actuators, METIS-213264, Semiconductor, Sensors, System(s), ProRISC, circuit, EWI-15568",
author = "M.S.B. Sowariraj and Theo Smedes and Cora Salm and A.J. Mouthaan and F.G. Kuper",
year = "2003",
month = "11",
day = "25",
language = "Undefined",
isbn = "90-73461-39-1",
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Sowariraj, MSB, Smedes, T, Salm, C, Mouthaan, AJ & Kuper, FG 2003, Study on the influence of package parasitics and substrate resistance on the Charged Device Model(CDM) failure levels - possible protection methodology. in Proceedings of the 6th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors SAFE 2003. STW, Utrecht, The Netherlands, pp. 657-662, 6th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors, SAFE 2003, Veldhoven, Netherlands, 25/11/03.

Study on the influence of package parasitics and substrate resistance on the Charged Device Model(CDM) failure levels - possible protection methodology. / Sowariraj, M.S.B.; Smedes, Theo; Salm, Cora; Mouthaan, A.J.; Kuper, F.G.

Proceedings of the 6th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors SAFE 2003. Utrecht, The Netherlands : STW, 2003. p. 657-662.

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademic

TY - GEN

T1 - Study on the influence of package parasitics and substrate resistance on the Charged Device Model(CDM) failure levels - possible protection methodology

AU - Sowariraj, M.S.B.

AU - Smedes, Theo

AU - Salm, Cora

AU - Mouthaan, A.J.

AU - Kuper, F.G.

PY - 2003/11/25

Y1 - 2003/11/25

N2 - Charged Device Model (CDM) type of Electrostatic Discharge (ESD) stress events are becoming the major reason for field returns in the Integrated Circuit (IC) industry especially with downscaling of device dimensions and increased usage of automated handlers. In the case of CDM stress, the IC is both the source of static charge and part of the discharge path. Hence CDM test results are greatly affected by the package properties and the distribution of the protection devices within the die. In this paper we present a systematic approach to understand the actual influence of these factors in the IC during a CDM event. The CDM test set-up is modeled using PSPICE circuit simulator and the discharge waveforms thus obtained are compared with the experimental observations. This model is then used to compare the actual discharge current flowing through the die and the protection structures for two different package materials. A general protection methodology for the ICs during CDM event, applicable to all IC design types, is suggested.

AB - Charged Device Model (CDM) type of Electrostatic Discharge (ESD) stress events are becoming the major reason for field returns in the Integrated Circuit (IC) industry especially with downscaling of device dimensions and increased usage of automated handlers. In the case of CDM stress, the IC is both the source of static charge and part of the discharge path. Hence CDM test results are greatly affected by the package properties and the distribution of the protection devices within the die. In this paper we present a systematic approach to understand the actual influence of these factors in the IC during a CDM event. The CDM test set-up is modeled using PSPICE circuit simulator and the discharge waveforms thus obtained are compared with the experimental observations. This model is then used to compare the actual discharge current flowing through the die and the protection structures for two different package materials. A general protection methodology for the ICs during CDM event, applicable to all IC design types, is suggested.

KW - IR-67745

KW - Actuators

KW - METIS-213264

KW - Semiconductor

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KW - circuit

KW - EWI-15568

M3 - Conference contribution

SN - 90-73461-39-1

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BT - Proceedings of the 6th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors SAFE 2003

PB - STW

CY - Utrecht, The Netherlands

ER -

Sowariraj MSB, Smedes T, Salm C, Mouthaan AJ, Kuper FG. Study on the influence of package parasitics and substrate resistance on the Charged Device Model(CDM) failure levels - possible protection methodology. In Proceedings of the 6th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors SAFE 2003. Utrecht, The Netherlands: STW. 2003. p. 657-662