Substrate Bounce in Mixed-Mode CMOS ICs

Bram Nauta; Gian Hoogzaad

doi:10.1007/978-1-4757-2983-2_7

Substrate Bounce in Mixed-Mode CMOS ICs

Bram Nauta, Gian Hoogzaad

Research output: Chapter in Book/Report/Conference proceeding › Chapter › Academic

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Abstract

Substrate noise is one of the key problems in mixed analog/digital ICs. Although measures are known to reduce substrate noise, the noise will never be completely eliminated since this requires larger chip area and thus higher cost. Analog circuits on digital ICs simply have to be resistant to substrate noise. A general strategy is given which can be summarized as: the supply of the analog circuits must be referred to the substrate and the analog signals must be referred to a clean analog ground. Furthermore several design constraints are given to minimize the effect of substrate noise on analog. Two band-gap circuits are discussed and it is shown that apparently minor design issues, such as the connection of an n-well of a PMOS differential pair, can have large impact on the substrate sensitivity of this circuit. This has been verified by measurements.

Original language	English
Title of host publication	Analog Circuit Design
Subtitle of host publication	Volt Electronics; Mixed-Mode Systems; Low-Noise and RF Power Amplifiers for Telecommunication
Editors	Johan Huijsing, Rudy van de Plassche
Place of Publication	Boston
Publisher	Kluwer Academic Publishers
Pages	157-171
Number of pages	15
ISBN (Electronic)	978-1-4757-2983-2
ISBN (Print)	978-0-7923-8400-7, 978-1-4419-5071-0
DOIs	https://doi.org/10.1007/978-1-4757-2983-2_7
Publication status	Published - 1999
Event	7th Workshop on Advances in Analog Circuit Design, AACD 1998 - Copenhagen, Denmark Duration: 28 Apr 1998 → 30 Apr 1998 Conference number: 7

Conference

Conference	7th Workshop on Advances in Analog Circuit Design, AACD 1998
Abbreviated title	AACD
Country/Territory	Denmark
City	Copenhagen
Period	28/04/98 → 30/04/98

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10.1007/978-1-4757-2983-2_7

ArticleFinal published version, 446 KB

Cite this

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title = "Substrate Bounce in Mixed-Mode CMOS ICs",

abstract = "Substrate noise is one of the key problems in mixed analog/digital ICs. Although measures are known to reduce substrate noise, the noise will never be completely eliminated since this requires larger chip area and thus higher cost. Analog circuits on digital ICs simply have to be resistant to substrate noise. A general strategy is given which can be summarized as: the supply of the analog circuits must be referred to the substrate and the analog signals must be referred to a clean analog ground. Furthermore several design constraints are given to minimize the effect of substrate noise on analog. Two band-gap circuits are discussed and it is shown that apparently minor design issues, such as the connection of an n-well of a PMOS differential pair, can have large impact on the substrate sensitivity of this circuit. This has been verified by measurements.",

author = "Bram Nauta and Gian Hoogzaad",

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booktitle = "Analog Circuit Design",

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address = "Netherlands",

note = "7th Workshop on Advances in Analog Circuit Design, AACD 1998, AACD ; Conference date: 28-04-1998 Through 30-04-1998",

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Nauta, B & Hoogzaad, G 1999, Substrate Bounce in Mixed-Mode CMOS ICs. in J Huijsing & R van de Plassche (eds), Analog Circuit Design: Volt Electronics; Mixed-Mode Systems; Low-Noise and RF Power Amplifiers for Telecommunication. Kluwer Academic Publishers, Boston, pp. 157-171, 7th Workshop on Advances in Analog Circuit Design, AACD 1998, Copenhagen, Denmark, 28/04/98. https://doi.org/10.1007/978-1-4757-2983-2_7

Substrate Bounce in Mixed-Mode CMOS ICs. / Nauta, Bram; Hoogzaad, Gian.
Analog Circuit Design: Volt Electronics; Mixed-Mode Systems; Low-Noise and RF Power Amplifiers for Telecommunication. ed. / Johan Huijsing; Rudy van de Plassche. Boston: Kluwer Academic Publishers, 1999. p. 157-171.

Research output: Chapter in Book/Report/Conference proceeding › Chapter › Academic

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AU - Hoogzaad, Gian

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AB - Substrate noise is one of the key problems in mixed analog/digital ICs. Although measures are known to reduce substrate noise, the noise will never be completely eliminated since this requires larger chip area and thus higher cost. Analog circuits on digital ICs simply have to be resistant to substrate noise. A general strategy is given which can be summarized as: the supply of the analog circuits must be referred to the substrate and the analog signals must be referred to a clean analog ground. Furthermore several design constraints are given to minimize the effect of substrate noise on analog. Two band-gap circuits are discussed and it is shown that apparently minor design issues, such as the connection of an n-well of a PMOS differential pair, can have large impact on the substrate sensitivity of this circuit. This has been verified by measurements.

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T2 - 7th Workshop on Advances in Analog Circuit Design, AACD 1998

Y2 - 28 April 1998 through 30 April 1998

ER -

Substrate Bounce in Mixed-Mode CMOS ICs

Abstract

Conference

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