Switching performance of low-voltage n-channel trench MOSFETs

Ray J.E. Hueting; E. A. Hijzen; A. W. Ludikhuize; M. A.A. 'T Zandt

doi:10.1109/ISPSD.2002.1016200

Switching performance of low-voltage n-channel trench MOSFETs

Ray J.E. Hueting^*, E. A. Hijzen, A. W. Ludikhuize, M. A.A. 'T Zandt

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

18 Citations (Scopus)

Abstract

Guidelines for optimising the switching behaviour of low-voltage (LV) n-channel trench MOSFETs are presented, with emphasis on the geometry and the doping profile. In our optimisation we focussed on three parameters: the specific on-resistance (R_ds,on), the gate-drain charge density (Q_gd) and the off-state breakdown voltage. We obtained by simulations for the 30V control switch an R_ds,on of less than 10 mΩmm² and an R_ds,onQ_gd of less than 15 mΩ.nC (applied voltage V_dd=12V). The result is a stripe cell structure with a trench width of 0.15 μm, a cell pitch of 1.0 μm. For the 25V synchronous rectifier we obtained in the same feature size figures-of-merit of 5 mΩ.mm² and 17 mΩ.nC.

Original language	English
Title of host publication	Proceedings of the 14th International Symposium on Power Semiconductor Devices and Ics
Publisher	IEEE
Pages	177-180
Number of pages	4
ISBN (Print)	0-7803-7318-9
DOIs	https://doi.org/10.1109/ISPSD.2002.1016200
Publication status	Published - 1 Jan 2002
Externally published	Yes
Event	14th International Symposium on Power Semiconductor Devices and IC's 2002 - Santa Fe, United States Duration: 4 Jun 2002 → 7 Jun 2002 Conference number: 14

Conference

Conference	14th International Symposium on Power Semiconductor Devices and IC's 2002
Abbreviated title	ISPSD 2002
Country	United States
City	Santa Fe
Period	4/06/02 → 7/06/02

Access to Document

10.1109/ISPSD.2002.1016200

Link to publication in Scopus

Fingerprint Dive into the research topics of 'Switching performance of low-voltage n-channel trench MOSFETs'. Together they form a unique fingerprint.

Cite this

@inproceedings{811a173fc5164a5e8085f5889211c9e1,

title = "Switching performance of low-voltage n-channel trench MOSFETs",

abstract = "Guidelines for optimising the switching behaviour of low-voltage (LV) n-channel trench MOSFETs are presented, with emphasis on the geometry and the doping profile. In our optimisation we focussed on three parameters: the specific on-resistance (Rds,on), the gate-drain charge density (Qgd) and the off-state breakdown voltage. We obtained by simulations for the 30V control switch an Rds,on of less than 10 mΩmm2 and an Rds,onQgd of less than 15 mΩ.nC (applied voltage Vdd=12V). The result is a stripe cell structure with a trench width of 0.15 μm, a cell pitch of 1.0 μm. For the 25V synchronous rectifier we obtained in the same feature size figures-of-merit of 5 mΩ.mm2 and 17 mΩ.nC.",

author = "Hueting, {Ray J.E.} and Hijzen, {E. A.} and Ludikhuize, {A. W.} and {'T Zandt}, {M. A.A.}",

year = "2002",

month = jan,

day = "1",

doi = "10.1109/ISPSD.2002.1016200",

language = "English",

isbn = "0-7803-7318-9",

pages = "177--180",

booktitle = "Proceedings of the 14th International Symposium on Power Semiconductor Devices and Ics",

publisher = "IEEE",

address = "United States",

note = "14th International Symposium on Power Semiconductor Devices and IC's 2002, ISPSD 2002 ; Conference date: 04-06-2002 Through 07-06-2002",

}

Hueting, RJE, Hijzen, EA, Ludikhuize, AW & 'T Zandt, MAA 2002, Switching performance of low-voltage n-channel trench MOSFETs. in Proceedings of the 14th International Symposium on Power Semiconductor Devices and Ics. IEEE, pp. 177-180, 14th International Symposium on Power Semiconductor Devices and IC's 2002, Santa Fe, United States, 4/06/02. https://doi.org/10.1109/ISPSD.2002.1016200

TY - GEN

T1 - Switching performance of low-voltage n-channel trench MOSFETs

AU - Hueting, Ray J.E.

AU - Hijzen, E. A.

AU - Ludikhuize, A. W.

AU - 'T Zandt, M. A.A.

N1 - Conference code: 14

PY - 2002/1/1

Y1 - 2002/1/1

N2 - Guidelines for optimising the switching behaviour of low-voltage (LV) n-channel trench MOSFETs are presented, with emphasis on the geometry and the doping profile. In our optimisation we focussed on three parameters: the specific on-resistance (Rds,on), the gate-drain charge density (Qgd) and the off-state breakdown voltage. We obtained by simulations for the 30V control switch an Rds,on of less than 10 mΩmm2 and an Rds,onQgd of less than 15 mΩ.nC (applied voltage Vdd=12V). The result is a stripe cell structure with a trench width of 0.15 μm, a cell pitch of 1.0 μm. For the 25V synchronous rectifier we obtained in the same feature size figures-of-merit of 5 mΩ.mm2 and 17 mΩ.nC.

AB - Guidelines for optimising the switching behaviour of low-voltage (LV) n-channel trench MOSFETs are presented, with emphasis on the geometry and the doping profile. In our optimisation we focussed on three parameters: the specific on-resistance (Rds,on), the gate-drain charge density (Qgd) and the off-state breakdown voltage. We obtained by simulations for the 30V control switch an Rds,on of less than 10 mΩmm2 and an Rds,onQgd of less than 15 mΩ.nC (applied voltage Vdd=12V). The result is a stripe cell structure with a trench width of 0.15 μm, a cell pitch of 1.0 μm. For the 25V synchronous rectifier we obtained in the same feature size figures-of-merit of 5 mΩ.mm2 and 17 mΩ.nC.

UR - http://www.scopus.com/inward/record.url?scp=0036048350&partnerID=8YFLogxK

U2 - 10.1109/ISPSD.2002.1016200

DO - 10.1109/ISPSD.2002.1016200

M3 - Conference contribution

AN - SCOPUS:0036048350

SN - 0-7803-7318-9

SP - 177

EP - 180

BT - Proceedings of the 14th International Symposium on Power Semiconductor Devices and Ics

PB - IEEE

T2 - 14th International Symposium on Power Semiconductor Devices and IC's 2002

Y2 - 4 June 2002 through 7 June 2002

ER -