Switching performance of low-voltage n-channel trench MOSFETs

Ray J.E. Hueting*, E. A. Hijzen, A. W. Ludikhuize, M. A.A. 'T Zandt

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

18 Citations (Scopus)

Abstract

Guidelines for optimising the switching behaviour of low-voltage (LV) n-channel trench MOSFETs are presented, with emphasis on the geometry and the doping profile. In our optimisation we focussed on three parameters: the specific on-resistance (Rds,on), the gate-drain charge density (Qgd) and the off-state breakdown voltage. We obtained by simulations for the 30V control switch an Rds,on of less than 10 mΩmm2 and an Rds,onQgd of less than 15 mΩ.nC (applied voltage Vdd=12V). The result is a stripe cell structure with a trench width of 0.15 μm, a cell pitch of 1.0 μm. For the 25V synchronous rectifier we obtained in the same feature size figures-of-merit of 5 mΩ.mm2 and 17 mΩ.nC.

Original languageEnglish
Title of host publicationProceedings of the 14th International Symposium on Power Semiconductor Devices and Ics
PublisherIEEE
Pages177-180
Number of pages4
ISBN (Print)0-7803-7318-9
DOIs
Publication statusPublished - 1 Jan 2002
Externally publishedYes
Event14th International Symposium on Power Semiconductor Devices and IC's 2002 - Santa Fe, United States
Duration: 4 Jun 20027 Jun 2002
Conference number: 14

Conference

Conference14th International Symposium on Power Semiconductor Devices and IC's 2002
Abbreviated titleISPSD 2002
CountryUnited States
CitySanta Fe
Period4/06/027/06/02

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