The parallel reception system (SYS) comprises a plurality of receiving devices (DIS1-DISN), each comprising an amplifying circuit (CA) in a frequency transformation stage coupled with the antenna and configured to perform a frequency transposition of the signal (Vin) received by said antenna. The analog amplifier circuit (CA) comprises transconductance amplifier units (UAj) in parallel, each comprising a PMOS transistor (PI) and an NMOS transistor (N2) the gates of which are connected to the input node (I) and the drains to the output node (O). A control means (MCOM) is configured to generate a digital control signal, of which each bit (Bj) respectively controls the supply of each amplifier unit (UAj) according to a sinusoidal wave representation at a frequency of interest.
|Patent number||WO2018083387 A1|
|Publication status||Published - 11 May 2018|