Template Generation - A Graph Profiling Algorithm

Yuanqing Guo, Gerard J.M. Smit

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    Abstract

    The availability of high-level design entry tooling is crucial for the viability of any reconfigurable SoC architecture. This paper presents a template generation algorithm. The objective of template generation step is to extract functional equivalent structures, i.e. templates, from a control data flow graph. By profiling the graph, the algorithm generates all the possible templates and the corresponding matches. Using unique serial numbers and circle numbers, the algorithm can find all distinct templates with multiple outputs. A new type of graph (hydragraph) that can cope with multiple outputs is introduced. The generated templates pepresented by the hydragraph are not limited in shapes, i.e., we can find templates with multiple outputs or multiple sinks.
    Original languageEnglish
    Title of host publicationProceedings of the 4th PROGRESS Symposium on Embedded Systems 2003
    Place of PublicationNieuwegein, The Netherlands
    PublisherSTW
    Pages96-101
    Number of pages6
    ISBN (Print)90-73461-37-5
    Publication statusPublished - Oct 2003
    Event4th PROGRESS Symposium on Embedded Systems 2003 - Nieuwegein, Netherlands
    Duration: 22 Oct 200322 Oct 2003
    Conference number: 4

    Conference

    Conference4th PROGRESS Symposium on Embedded Systems 2003
    Abbreviated titlePROGRESS
    CountryNetherlands
    CityNieuwegein
    Period22/10/0322/10/03

    Keywords

    • CAES-EEA: Efficient Embedded Architectures
    • Montium
    • Hydragraph

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  • Cite this

    Guo, Y., & Smit, G. J. M. (2003). Template Generation - A Graph Profiling Algorithm. In Proceedings of the 4th PROGRESS Symposium on Embedded Systems 2003 (pp. 96-101). Nieuwegein, The Netherlands: STW.