Template Generation - A Graph Profiling Algorithm

Research output: Contribution to conferencePaperAcademic

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Abstract

The availability of high-level design entry tooling is crucial for the viability of any reconfigurable SoC architecture. This paper presents a template generation algorithm. The objective of template generation step is to extract functional equivalent structures, i.e. templates, from a control data flow graph. By profiling the graph, the algorithm generates all the possible templates and the corresponding matches. Using unique serial numbers and circle numbers, the algorithm can find all distinct templates with multiple outputs. A new type of graph (hydragraph) that can cope with multiple outputs is introduced. The generated templates pepresented by the hydragraph are not limited in shapes, i.e., we can find templates with multiple outputs or multiple sinks.
Original languageEnglish
Pages96-101
Number of pages6
Publication statusPublished - Oct 2003
Event4th PROGRESS Symposium on Embedded Systems 2003 - Nieuwegein, Netherlands
Duration: 22 Oct 200322 Oct 2003
Conference number: 4

Conference

Conference4th PROGRESS Symposium on Embedded Systems 2003
Abbreviated titlePROGRESS
CountryNetherlands
CityNieuwegein
Period22/10/0322/10/03

Fingerprint

Data flow graphs
Availability
System-on-chip

Keywords

  • IR-66352
  • EWI-6914
  • CAES-EEA: Efficient Embedded Architectures

Cite this

Guo, Y., & Smit, G. J. M. (2003). Template Generation - A Graph Profiling Algorithm. 96-101. Paper presented at 4th PROGRESS Symposium on Embedded Systems 2003, Nieuwegein, Netherlands.
Guo, Y. ; Smit, Gerardus Johannes Maria. / Template Generation - A Graph Profiling Algorithm. Paper presented at 4th PROGRESS Symposium on Embedded Systems 2003, Nieuwegein, Netherlands.6 p.
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keywords = "IR-66352, EWI-6914, CAES-EEA: Efficient Embedded Architectures",
author = "Y. Guo and Smit, {Gerardus Johannes Maria}",
year = "2003",
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note = "4th PROGRESS Symposium on Embedded Systems 2003, PROGRESS ; Conference date: 22-10-2003 Through 22-10-2003",

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Guo, Y & Smit, GJM 2003, 'Template Generation - A Graph Profiling Algorithm' Paper presented at 4th PROGRESS Symposium on Embedded Systems 2003, Nieuwegein, Netherlands, 22/10/03 - 22/10/03, pp. 96-101.

Template Generation - A Graph Profiling Algorithm. / Guo, Y.; Smit, Gerardus Johannes Maria.

2003. 96-101 Paper presented at 4th PROGRESS Symposium on Embedded Systems 2003, Nieuwegein, Netherlands.

Research output: Contribution to conferencePaperAcademic

TY - CONF

T1 - Template Generation - A Graph Profiling Algorithm

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AU - Smit, Gerardus Johannes Maria

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N2 - The availability of high-level design entry tooling is crucial for the viability of any reconfigurable SoC architecture. This paper presents a template generation algorithm. The objective of template generation step is to extract functional equivalent structures, i.e. templates, from a control data flow graph. By profiling the graph, the algorithm generates all the possible templates and the corresponding matches. Using unique serial numbers and circle numbers, the algorithm can find all distinct templates with multiple outputs. A new type of graph (hydragraph) that can cope with multiple outputs is introduced. The generated templates pepresented by the hydragraph are not limited in shapes, i.e., we can find templates with multiple outputs or multiple sinks.

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KW - IR-66352

KW - EWI-6914

KW - CAES-EEA: Efficient Embedded Architectures

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Guo Y, Smit GJM. Template Generation - A Graph Profiling Algorithm. 2003. Paper presented at 4th PROGRESS Symposium on Embedded Systems 2003, Nieuwegein, Netherlands.