Template Generation and Selection Algorithms

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

5 Citations (Scopus)
30 Downloads (Pure)

Abstract

The availability of high-level design entry tooling is crucial for the viability of any reconfigurable SoC architecture. This paper presents a template generation method to extract functional equivalent structures, i.e. templates, from a control data flow graph. By inspecting the graph the algorithm generates all the possible templates and the corresponding matches. Using unique serial numbers and circle numbers the algorithm can find all distinct templates with multiple outputs. The template selection algorithm shows how this information can be used in compilers for reconfigurable systems. The objective of the template selection algorithm is to find an efficient cover for an application graph with a minimal number of distinct templates and minimal number of matches.
Original languageUndefined
Title of host publicationProceedings of International Workshop on System-on-Chip for Real-Time Applications 2003
EditorsW. Badaway, Y. Ismail
Place of PublicationLos Alamitos, California
PublisherIEEE Computer Society
Pages2-5
Number of pages4
ISBN (Print)0-7695-1944-X
DOIs
Publication statusPublished - Jun 2003

Publication series

Name
PublisherIEEE Computer Society

Keywords

  • EWI-1513
  • METIS-214812
  • IR-46374
  • CAES-EEA: Efficient Embedded Architectures

Cite this

Guo, Y., Smit, G. J. M., Broersma, H. J., & Heysters, P. M. (2003). Template Generation and Selection Algorithms. In W. Badaway, & Y. Ismail (Eds.), Proceedings of International Workshop on System-on-Chip for Real-Time Applications 2003 (pp. 2-5). Los Alamitos, California: IEEE Computer Society. https://doi.org/10.1109/IWSOC.2003.1212995
Guo, Y. ; Smit, Gerardus Johannes Maria ; Broersma, Haitze J. ; Heysters, P.M. / Template Generation and Selection Algorithms. Proceedings of International Workshop on System-on-Chip for Real-Time Applications 2003. editor / W. Badaway ; Y. Ismail. Los Alamitos, California : IEEE Computer Society, 2003. pp. 2-5
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keywords = "EWI-1513, METIS-214812, IR-46374, CAES-EEA: Efficient Embedded Architectures",
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Guo, Y, Smit, GJM, Broersma, HJ & Heysters, PM 2003, Template Generation and Selection Algorithms. in W Badaway & Y Ismail (eds), Proceedings of International Workshop on System-on-Chip for Real-Time Applications 2003. IEEE Computer Society, Los Alamitos, California, pp. 2-5. https://doi.org/10.1109/IWSOC.2003.1212995

Template Generation and Selection Algorithms. / Guo, Y.; Smit, Gerardus Johannes Maria; Broersma, Haitze J.; Heysters, P.M.

Proceedings of International Workshop on System-on-Chip for Real-Time Applications 2003. ed. / W. Badaway; Y. Ismail. Los Alamitos, California : IEEE Computer Society, 2003. p. 2-5.

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

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PY - 2003/6

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N2 - The availability of high-level design entry tooling is crucial for the viability of any reconfigurable SoC architecture. This paper presents a template generation method to extract functional equivalent structures, i.e. templates, from a control data flow graph. By inspecting the graph the algorithm generates all the possible templates and the corresponding matches. Using unique serial numbers and circle numbers the algorithm can find all distinct templates with multiple outputs. The template selection algorithm shows how this information can be used in compilers for reconfigurable systems. The objective of the template selection algorithm is to find an efficient cover for an application graph with a minimal number of distinct templates and minimal number of matches.

AB - The availability of high-level design entry tooling is crucial for the viability of any reconfigurable SoC architecture. This paper presents a template generation method to extract functional equivalent structures, i.e. templates, from a control data flow graph. By inspecting the graph the algorithm generates all the possible templates and the corresponding matches. Using unique serial numbers and circle numbers the algorithm can find all distinct templates with multiple outputs. The template selection algorithm shows how this information can be used in compilers for reconfigurable systems. The objective of the template selection algorithm is to find an efficient cover for an application graph with a minimal number of distinct templates and minimal number of matches.

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Guo Y, Smit GJM, Broersma HJ, Heysters PM. Template Generation and Selection Algorithms. In Badaway W, Ismail Y, editors, Proceedings of International Workshop on System-on-Chip for Real-Time Applications 2003. Los Alamitos, California: IEEE Computer Society. 2003. p. 2-5 https://doi.org/10.1109/IWSOC.2003.1212995