@inbook{2dfc6d721f0f4ba181257d512c87938f,
title = "Temporal Logic Model Checking",
author = "Clarke, \{Edmund M.\} and Ansgar Fehnker and Jha, \{Sumit Kumar\} and Helmut Veith",
year = "2005",
doi = "10.1007/0-8176-4404-0\_23",
language = "English",
isbn = "978-0-8176-3239-7",
series = "Control engineering",
publisher = "Birkh{\"a}user",
pages = "539--558",
editor = "Dimitrios Hristu-Varsakelis and Levine, \{William S.\}",
booktitle = "Handbook of Networked and Embedded Control Systems",
address = "Switzerland",
}