Advances in the semiconductor process technology enable the creation of a complete system on one single die, the so-called system chip or SOC. To reduce time-to-market for large SOCs, reuse of pre-designed and pre-veried blocks called cores is employed. Like the design style, testing of SOCs can be best approached in a core-based fashion. In order to enable core-based test development, an embedded core should be isolated from its surrounding circuitry and electrical test access from chip pins to the core should be provided. Isolation of a core is done by designing a wrapper around the core, while the test access to the core is provided by means of a dedicated Test Access Mechanism (TAM).
|Award date||2 Feb 2005|
|Place of Publication||Eindhoven|
|Publication status||Published - 2 Feb 2005|