Test strategies for high-speed synchronization interfaces

Octavian Petre

Research output: ThesisPhD Thesis - Research UT, graduation UT

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Abstract

This thesis presents test strategies for on-chip or o-chip high-speed syn-chronization interfaces
Original languageUndefined
Supervisors/Advisors
  • Krol, Th., Supervisor
  • Kerkhoff, Hans Gerard, Advisor
Award date27 Feb 2004
Place of PublicationEnschede
Publisher
Print ISBNs9789036520225
Publication statusPublished - 2004
Externally publishedYes

Keywords

  • IR-41425

Cite this

Petre, O. (2004). Test strategies for high-speed synchronization interfaces. Enschede: University of Twente.