Test structures design considerations for RF-CV measurements on leaky dielectrics

Jurriaan Schmitz, Florence N. Cubaynes, Ramon J. Havens, Randy de Kort, Andries J. Scholten, Luuk F. Tiemeijer

    Research output: Contribution to journalArticleAcademicpeer-review

    20 Citations (Scopus)
    29 Downloads (Pure)

    Abstract

    We present an MOS capacitance-voltage measurement methodology that, contrary to present methods, is highly robust against gate leakage current densities up to 1000 A/cm/sup 2/. The methodology features specially designed RF test structures and RF measurement frequencies. It allows MOS parameter extraction in the full range of accumulation, depletion, and inversion.
    Original languageEnglish
    Pages (from-to)150-154
    Number of pages5
    JournalIEEE transactions on semiconductor manufacturing
    Volume17
    Issue number2
    DOIs
    Publication statusPublished - 1 May 2004

    Keywords

    • Gate leakage
    • RF
    • Capacitance-voltage (C–V)
    • CMOS
    • Direct tunneling
    • Characterization

    Fingerprint Dive into the research topics of 'Test structures design considerations for RF-CV measurements on leaky dielectrics'. Together they form a unique fingerprint.

    Cite this