Test structures design considerations for RF-CV measurements on leaky dielectrics

Jurriaan Schmitz; Florence N. Cubaynes; Ramon J. Havens; Randy de Kort; Andries J. Scholten; Luuk F. Tiemeijer

doi:10.1109/TSM.2004.826998

Test structures design considerations for RF-CV measurements on leaky dielectrics

Jurriaan Schmitz, Florence N. Cubaynes, Ramon J. Havens, Randy de Kort, Andries J. Scholten, Luuk F. Tiemeijer

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Abstract

We present an MOS capacitance-voltage measurement methodology that, contrary to present methods, is highly robust against gate leakage current densities up to 1000 A/cm/sup 2/. The methodology features specially designed RF test structures and RF measurement frequencies. It allows MOS parameter extraction in the full range of accumulation, depletion, and inversion.

Original language	English
Pages (from-to)	150-154
Number of pages	5
Journal	IEEE transactions on semiconductor manufacturing
Volume	17
Issue number	2
DOIs	https://doi.org/10.1109/TSM.2004.826998
Publication status	Published - 1 May 2004

Keywords

Gate leakage
RF
Capacitance-voltage (C–V)
CMOS
Direct tunneling
Characterization

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10.1109/TSM.2004.826998

Test Structure Design Considerations for RF-CV Measurements on Leaky Dielectrics (1)Submitted version, 487 KBLicence: Unspecified

Cite this

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title = "Test structures design considerations for RF-CV measurements on leaky dielectrics",

abstract = "We present an MOS capacitance-voltage measurement methodology that, contrary to present methods, is highly robust against gate leakage current densities up to 1000 A/cm/sup 2/. The methodology features specially designed RF test structures and RF measurement frequencies. It allows MOS parameter extraction in the full range of accumulation, depletion, and inversion.",

keywords = "Gate leakage, RF, Capacitance-voltage (C–V), CMOS, Direct tunneling, Characterization",

author = "Jurriaan Schmitz and Cubaynes, {Florence N.} and Havens, {Ramon J.} and {de Kort}, Randy and Scholten, {Andries J.} and Tiemeijer, {Luuk F.}",

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AU - Schmitz, Jurriaan

AU - Cubaynes, Florence N.

AU - Havens, Ramon J.

AU - de Kort, Randy

AU - Scholten, Andries J.

AU - Tiemeijer, Luuk F.

PY - 2004/5/1

Y1 - 2004/5/1

N2 - We present an MOS capacitance-voltage measurement methodology that, contrary to present methods, is highly robust against gate leakage current densities up to 1000 A/cm/sup 2/. The methodology features specially designed RF test structures and RF measurement frequencies. It allows MOS parameter extraction in the full range of accumulation, depletion, and inversion.

AB - We present an MOS capacitance-voltage measurement methodology that, contrary to present methods, is highly robust against gate leakage current densities up to 1000 A/cm/sup 2/. The methodology features specially designed RF test structures and RF measurement frequencies. It allows MOS parameter extraction in the full range of accumulation, depletion, and inversion.

KW - Gate leakage

KW - RF

KW - Capacitance-voltage (C–V)

KW - CMOS

KW - Direct tunneling

KW - Characterization

U2 - 10.1109/TSM.2004.826998

DO - 10.1109/TSM.2004.826998

M3 - Article

SN - 0894-6507

VL - 17

SP - 150

EP - 154

JO - IEEE transactions on semiconductor manufacturing

JF - IEEE transactions on semiconductor manufacturing

IS - 2

ER -

Test structures design considerations for RF-CV measurements on leaky dielectrics

Abstract

Keywords

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